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Add crc and crypto to target feature whitelist on arm
[rust.git] / src / librustc_codegen_llvm / llvm_util.rs
1 use crate::back::write::create_informational_target_machine;
2 use crate::llvm;
3 use syntax_pos::symbol::Symbol;
4 use rustc::session::Session;
5 use rustc::session::config::PrintRequest;
6 use rustc_target::spec::{MergeFunctions, PanicStrategy};
7 use libc::c_int;
8 use std::ffi::CString;
9 use syntax::feature_gate::UnstableFeatures;
10 use syntax::symbol::sym;
11
12 use std::str;
13 use std::slice;
14 use std::sync::atomic::{AtomicBool, Ordering};
15 use std::sync::Once;
16
17 static POISONED: AtomicBool = AtomicBool::new(false);
18 static INIT: Once = Once::new();
19
20 pub(crate) fn init(sess: &Session) {
21     unsafe {
22         // Before we touch LLVM, make sure that multithreading is enabled.
23         INIT.call_once(|| {
24             if llvm::LLVMStartMultithreaded() != 1 {
25                 // use an extra bool to make sure that all future usage of LLVM
26                 // cannot proceed despite the Once not running more than once.
27                 POISONED.store(true, Ordering::SeqCst);
28             }
29
30             configure_llvm(sess);
31         });
32
33         if POISONED.load(Ordering::SeqCst) {
34             bug!("couldn't enable multi-threaded LLVM");
35         }
36     }
37 }
38
39 fn require_inited() {
40     INIT.call_once(|| bug!("llvm is not initialized"));
41     if POISONED.load(Ordering::SeqCst) {
42         bug!("couldn't enable multi-threaded LLVM");
43     }
44 }
45
46 unsafe fn configure_llvm(sess: &Session) {
47     let n_args = sess.opts.cg.llvm_args.len();
48     let mut llvm_c_strs = Vec::with_capacity(n_args + 1);
49     let mut llvm_args = Vec::with_capacity(n_args + 1);
50
51     llvm::LLVMRustInstallFatalErrorHandler();
52
53     {
54         let mut add = |arg: &str| {
55             let s = CString::new(arg).unwrap();
56             llvm_args.push(s.as_ptr());
57             llvm_c_strs.push(s);
58         };
59         add("rustc"); // fake program name
60         if sess.time_llvm_passes() { add("-time-passes"); }
61         if sess.print_llvm_passes() { add("-debug-pass=Structure"); }
62         if sess.opts.debugging_opts.disable_instrumentation_preinliner {
63             add("-disable-preinline");
64         }
65         if sess.opts.debugging_opts.generate_arange_section {
66             add("-generate-arange-section");
67         }
68         if get_major_version() >= 8 {
69             match sess.opts.debugging_opts.merge_functions
70                   .unwrap_or(sess.target.target.options.merge_functions) {
71                 MergeFunctions::Disabled |
72                 MergeFunctions::Trampolines => {}
73                 MergeFunctions::Aliases => {
74                     add("-mergefunc-use-aliases");
75                 }
76             }
77         }
78
79         if sess.target.target.target_os == "emscripten" &&
80             sess.panic_strategy() == PanicStrategy::Unwind {
81             add("-enable-emscripten-cxx-exceptions");
82         }
83
84         // HACK(eddyb) LLVM inserts `llvm.assume` calls to preserve align attributes
85         // during inlining. Unfortunately these may block other optimizations.
86         add("-preserve-alignment-assumptions-during-inlining=false");
87
88         for arg in &sess.opts.cg.llvm_args {
89             add(&(*arg));
90         }
91     }
92
93     llvm::LLVMInitializePasses();
94
95     ::rustc_llvm::initialize_available_targets();
96
97     llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int,
98                                  llvm_args.as_ptr());
99 }
100
101 // WARNING: the features after applying `to_llvm_feature` must be known
102 // to LLVM or the feature detection code will walk past the end of the feature
103 // array, leading to crashes.
104
105 const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
106     ("aclass", Some(sym::arm_target_feature)),
107     ("mclass", Some(sym::arm_target_feature)),
108     ("rclass", Some(sym::arm_target_feature)),
109     ("dsp", Some(sym::arm_target_feature)),
110     ("neon", Some(sym::arm_target_feature)),
111     ("crc", Some(sym::arm_target_feature)),
112     ("crypto", Some(sym::arm_target_feature)),
113     ("v5te", Some(sym::arm_target_feature)),
114     ("v6", Some(sym::arm_target_feature)),
115     ("v6k", Some(sym::arm_target_feature)),
116     ("v6t2", Some(sym::arm_target_feature)),
117     ("v7", Some(sym::arm_target_feature)),
118     ("v8", Some(sym::arm_target_feature)),
119     ("vfp2", Some(sym::arm_target_feature)),
120     ("vfp3", Some(sym::arm_target_feature)),
121     ("vfp4", Some(sym::arm_target_feature)),
122 ];
123
124 const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
125     ("fp", Some(sym::aarch64_target_feature)),
126     ("neon", Some(sym::aarch64_target_feature)),
127     ("sve", Some(sym::aarch64_target_feature)),
128     ("crc", Some(sym::aarch64_target_feature)),
129     ("crypto", Some(sym::aarch64_target_feature)),
130     ("ras", Some(sym::aarch64_target_feature)),
131     ("lse", Some(sym::aarch64_target_feature)),
132     ("rdm", Some(sym::aarch64_target_feature)),
133     ("fp16", Some(sym::aarch64_target_feature)),
134     ("rcpc", Some(sym::aarch64_target_feature)),
135     ("dotprod", Some(sym::aarch64_target_feature)),
136     ("v8.1a", Some(sym::aarch64_target_feature)),
137     ("v8.2a", Some(sym::aarch64_target_feature)),
138     ("v8.3a", Some(sym::aarch64_target_feature)),
139 ];
140
141 const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
142     ("adx", Some(sym::adx_target_feature)),
143     ("aes", None),
144     ("avx", None),
145     ("avx2", None),
146     ("avx512bw", Some(sym::avx512_target_feature)),
147     ("avx512cd", Some(sym::avx512_target_feature)),
148     ("avx512dq", Some(sym::avx512_target_feature)),
149     ("avx512er", Some(sym::avx512_target_feature)),
150     ("avx512f", Some(sym::avx512_target_feature)),
151     ("avx512ifma", Some(sym::avx512_target_feature)),
152     ("avx512pf", Some(sym::avx512_target_feature)),
153     ("avx512vbmi", Some(sym::avx512_target_feature)),
154     ("avx512vl", Some(sym::avx512_target_feature)),
155     ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
156     ("bmi1", None),
157     ("bmi2", None),
158     ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
159     ("f16c", Some(sym::f16c_target_feature)),
160     ("fma", None),
161     ("fxsr", None),
162     ("lzcnt", None),
163     ("mmx", Some(sym::mmx_target_feature)),
164     ("movbe", Some(sym::movbe_target_feature)),
165     ("pclmulqdq", None),
166     ("popcnt", None),
167     ("rdrand", None),
168     ("rdseed", None),
169     ("rtm", Some(sym::rtm_target_feature)),
170     ("sha", None),
171     ("sse", None),
172     ("sse2", None),
173     ("sse3", None),
174     ("sse4.1", None),
175     ("sse4.2", None),
176     ("sse4a", Some(sym::sse4a_target_feature)),
177     ("ssse3", None),
178     ("tbm", Some(sym::tbm_target_feature)),
179     ("xsave", None),
180     ("xsavec", None),
181     ("xsaveopt", None),
182     ("xsaves", None),
183 ];
184
185 const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
186     ("hvx", Some(sym::hexagon_target_feature)),
187     ("hvx-length128b", Some(sym::hexagon_target_feature)),
188 ];
189
190 const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
191     ("altivec", Some(sym::powerpc_target_feature)),
192     ("power8-altivec", Some(sym::powerpc_target_feature)),
193     ("power9-altivec", Some(sym::powerpc_target_feature)),
194     ("power8-vector", Some(sym::powerpc_target_feature)),
195     ("power9-vector", Some(sym::powerpc_target_feature)),
196     ("vsx", Some(sym::powerpc_target_feature)),
197 ];
198
199 const MIPS_WHITELIST: &[(&str, Option<Symbol>)] = &[
200     ("fp64", Some(sym::mips_target_feature)),
201     ("msa", Some(sym::mips_target_feature)),
202 ];
203
204 const WASM_WHITELIST: &[(&str, Option<Symbol>)] = &[
205     ("simd128", Some(sym::wasm_target_feature)),
206     ("atomics", Some(sym::wasm_target_feature)),
207 ];
208
209 /// When rustdoc is running, provide a list of all known features so that all their respective
210 /// primitives may be documented.
211 ///
212 /// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
213 /// iterator!
214 pub fn all_known_features() -> impl Iterator<Item=(&'static str, Option<Symbol>)> {
215     ARM_WHITELIST.iter().cloned()
216         .chain(AARCH64_WHITELIST.iter().cloned())
217         .chain(X86_WHITELIST.iter().cloned())
218         .chain(HEXAGON_WHITELIST.iter().cloned())
219         .chain(POWERPC_WHITELIST.iter().cloned())
220         .chain(MIPS_WHITELIST.iter().cloned())
221         .chain(WASM_WHITELIST.iter().cloned())
222 }
223
224 pub fn to_llvm_feature<'a>(sess: &Session, s: &'a str) -> &'a str {
225     let arch = if sess.target.target.arch == "x86_64" {
226         "x86"
227     } else {
228         &*sess.target.target.arch
229     };
230     match (arch, s) {
231         ("x86", "pclmulqdq") => "pclmul",
232         ("x86", "rdrand") => "rdrnd",
233         ("x86", "bmi1") => "bmi",
234         ("x86", "cmpxchg16b") => "cx16",
235         ("aarch64", "fp") => "fp-armv8",
236         ("aarch64", "fp16") => "fullfp16",
237         (_, s) => s,
238     }
239 }
240
241 pub fn target_features(sess: &Session) -> Vec<Symbol> {
242     let target_machine = create_informational_target_machine(sess, true);
243     target_feature_whitelist(sess)
244         .iter()
245         .filter_map(|&(feature, gate)| {
246             if UnstableFeatures::from_environment().is_nightly_build() || gate.is_none() {
247                 Some(feature)
248             } else {
249                 None
250             }
251         })
252         .filter(|feature| {
253             let llvm_feature = to_llvm_feature(sess, feature);
254             let cstr = CString::new(llvm_feature).unwrap();
255             unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
256         })
257         .map(|feature| Symbol::intern(feature)).collect()
258 }
259
260 pub fn target_feature_whitelist(sess: &Session)
261     -> &'static [(&'static str, Option<Symbol>)]
262 {
263     match &*sess.target.target.arch {
264         "arm" => ARM_WHITELIST,
265         "aarch64" => AARCH64_WHITELIST,
266         "x86" | "x86_64" => X86_WHITELIST,
267         "hexagon" => HEXAGON_WHITELIST,
268         "mips" | "mips64" => MIPS_WHITELIST,
269         "powerpc" | "powerpc64" => POWERPC_WHITELIST,
270         "wasm32" => WASM_WHITELIST,
271         _ => &[],
272     }
273 }
274
275 pub fn print_version() {
276     // Can be called without initializing LLVM
277     unsafe {
278         println!("LLVM version: {}.{}",
279                  llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
280     }
281 }
282
283 pub fn get_major_version() -> u32 {
284     unsafe { llvm::LLVMRustVersionMajor() }
285 }
286
287 pub fn print_passes() {
288     // Can be called without initializing LLVM
289     unsafe { llvm::LLVMRustPrintPasses(); }
290 }
291
292 pub(crate) fn print(req: PrintRequest, sess: &Session) {
293     require_inited();
294     let tm = create_informational_target_machine(sess, true);
295     unsafe {
296         match req {
297             PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
298             PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
299             _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
300         }
301     }
302 }
303
304 pub fn target_cpu(sess: &Session) -> &str {
305     let name = match sess.opts.cg.target_cpu {
306         Some(ref s) => &**s,
307         None => &*sess.target.target.options.cpu
308     };
309     if name != "native" {
310         return name
311     }
312
313     unsafe {
314         let mut len = 0;
315         let ptr = llvm::LLVMRustGetHostCPUName(&mut len);
316         str::from_utf8(slice::from_raw_parts(ptr as *const u8, len)).unwrap()
317     }
318 }