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[rust.git] / src / librustc_codegen_llvm / llvm_util.rs
1 use crate::back::write::create_informational_target_machine;
2 use crate::llvm;
3 use libc::c_int;
4 use rustc_data_structures::fx::FxHashSet;
5 use rustc_feature::UnstableFeatures;
6 use rustc_middle::bug;
7 use rustc_session::config::PrintRequest;
8 use rustc_session::Session;
9 use rustc_span::symbol::sym;
10 use rustc_span::symbol::Symbol;
11 use rustc_target::spec::{MergeFunctions, PanicStrategy};
12 use std::ffi::CString;
13
14 use std::slice;
15 use std::str;
16 use std::sync::atomic::{AtomicBool, Ordering};
17 use std::sync::Once;
18
19 static POISONED: AtomicBool = AtomicBool::new(false);
20 static INIT: Once = Once::new();
21
22 pub(crate) fn init(sess: &Session) {
23     unsafe {
24         // Before we touch LLVM, make sure that multithreading is enabled.
25         INIT.call_once(|| {
26             if llvm::LLVMStartMultithreaded() != 1 {
27                 // use an extra bool to make sure that all future usage of LLVM
28                 // cannot proceed despite the Once not running more than once.
29                 POISONED.store(true, Ordering::SeqCst);
30             }
31
32             configure_llvm(sess);
33         });
34
35         if POISONED.load(Ordering::SeqCst) {
36             bug!("couldn't enable multi-threaded LLVM");
37         }
38     }
39 }
40
41 fn require_inited() {
42     INIT.call_once(|| bug!("llvm is not initialized"));
43     if POISONED.load(Ordering::SeqCst) {
44         bug!("couldn't enable multi-threaded LLVM");
45     }
46 }
47
48 unsafe fn configure_llvm(sess: &Session) {
49     let n_args = sess.opts.cg.llvm_args.len() + sess.target.target.options.llvm_args.len();
50     let mut llvm_c_strs = Vec::with_capacity(n_args + 1);
51     let mut llvm_args = Vec::with_capacity(n_args + 1);
52
53     llvm::LLVMRustInstallFatalErrorHandler();
54
55     fn llvm_arg_to_arg_name(full_arg: &str) -> &str {
56         full_arg.trim().split(|c: char| c == '=' || c.is_whitespace()).next().unwrap_or("")
57     }
58
59     let cg_opts = sess.opts.cg.llvm_args.iter();
60     let tg_opts = sess.target.target.options.llvm_args.iter();
61     let sess_args = cg_opts.chain(tg_opts);
62
63     let user_specified_args: FxHashSet<_> =
64         sess_args.clone().map(|s| llvm_arg_to_arg_name(s)).filter(|s| !s.is_empty()).collect();
65
66     {
67         // This adds the given argument to LLVM. Unless `force` is true
68         // user specified arguments are *not* overridden.
69         let mut add = |arg: &str, force: bool| {
70             if force || !user_specified_args.contains(llvm_arg_to_arg_name(arg)) {
71                 let s = CString::new(arg).unwrap();
72                 llvm_args.push(s.as_ptr());
73                 llvm_c_strs.push(s);
74             }
75         };
76         add("rustc", true); // fake program name
77         if sess.time_llvm_passes() {
78             add("-time-passes", false);
79         }
80         if sess.print_llvm_passes() {
81             add("-debug-pass=Structure", false);
82         }
83         if !sess.opts.debugging_opts.no_generate_arange_section {
84             add("-generate-arange-section", false);
85         }
86         match sess
87             .opts
88             .debugging_opts
89             .merge_functions
90             .unwrap_or(sess.target.target.options.merge_functions)
91         {
92             MergeFunctions::Disabled | MergeFunctions::Trampolines => {}
93             MergeFunctions::Aliases => {
94                 add("-mergefunc-use-aliases", false);
95             }
96         }
97
98         if sess.target.target.target_os == "emscripten"
99             && sess.panic_strategy() == PanicStrategy::Unwind
100         {
101             add("-enable-emscripten-cxx-exceptions", false);
102         }
103
104         // HACK(eddyb) LLVM inserts `llvm.assume` calls to preserve align attributes
105         // during inlining. Unfortunately these may block other optimizations.
106         add("-preserve-alignment-assumptions-during-inlining=false", false);
107
108         for arg in sess_args {
109             add(&(*arg), true);
110         }
111     }
112
113     if sess.opts.debugging_opts.llvm_time_trace && get_major_version() >= 9 {
114         // time-trace is not thread safe and running it in parallel will cause seg faults.
115         if !sess.opts.debugging_opts.no_parallel_llvm {
116             bug!("`-Z llvm-time-trace` requires `-Z no-parallel-llvm")
117         }
118
119         llvm::LLVMTimeTraceProfilerInitialize();
120     }
121
122     llvm::LLVMInitializePasses();
123
124     ::rustc_llvm::initialize_available_targets();
125
126     llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int, llvm_args.as_ptr());
127 }
128
129 pub fn time_trace_profiler_finish(file_name: &str) {
130     unsafe {
131         if get_major_version() >= 9 {
132             let file_name = CString::new(file_name).unwrap();
133             llvm::LLVMTimeTraceProfilerFinish(file_name.as_ptr());
134         }
135     }
136 }
137
138 // WARNING: the features after applying `to_llvm_feature` must be known
139 // to LLVM or the feature detection code will walk past the end of the feature
140 // array, leading to crashes.
141
142 const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
143     ("aclass", Some(sym::arm_target_feature)),
144     ("mclass", Some(sym::arm_target_feature)),
145     ("rclass", Some(sym::arm_target_feature)),
146     ("dsp", Some(sym::arm_target_feature)),
147     ("neon", Some(sym::arm_target_feature)),
148     ("crc", Some(sym::arm_target_feature)),
149     ("crypto", Some(sym::arm_target_feature)),
150     ("v5te", Some(sym::arm_target_feature)),
151     ("v6", Some(sym::arm_target_feature)),
152     ("v6k", Some(sym::arm_target_feature)),
153     ("v6t2", Some(sym::arm_target_feature)),
154     ("v7", Some(sym::arm_target_feature)),
155     ("v8", Some(sym::arm_target_feature)),
156     ("vfp2", Some(sym::arm_target_feature)),
157     ("vfp3", Some(sym::arm_target_feature)),
158     ("vfp4", Some(sym::arm_target_feature)),
159 ];
160
161 const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
162     ("fp", Some(sym::aarch64_target_feature)),
163     ("neon", Some(sym::aarch64_target_feature)),
164     ("sve", Some(sym::aarch64_target_feature)),
165     ("crc", Some(sym::aarch64_target_feature)),
166     ("crypto", Some(sym::aarch64_target_feature)),
167     ("ras", Some(sym::aarch64_target_feature)),
168     ("lse", Some(sym::aarch64_target_feature)),
169     ("rdm", Some(sym::aarch64_target_feature)),
170     ("fp16", Some(sym::aarch64_target_feature)),
171     ("rcpc", Some(sym::aarch64_target_feature)),
172     ("dotprod", Some(sym::aarch64_target_feature)),
173     ("tme", Some(sym::aarch64_target_feature)),
174     ("v8.1a", Some(sym::aarch64_target_feature)),
175     ("v8.2a", Some(sym::aarch64_target_feature)),
176     ("v8.3a", Some(sym::aarch64_target_feature)),
177 ];
178
179 const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
180     ("adx", Some(sym::adx_target_feature)),
181     ("aes", None),
182     ("avx", None),
183     ("avx2", None),
184     ("avx512bw", Some(sym::avx512_target_feature)),
185     ("avx512cd", Some(sym::avx512_target_feature)),
186     ("avx512dq", Some(sym::avx512_target_feature)),
187     ("avx512er", Some(sym::avx512_target_feature)),
188     ("avx512f", Some(sym::avx512_target_feature)),
189     ("avx512ifma", Some(sym::avx512_target_feature)),
190     ("avx512pf", Some(sym::avx512_target_feature)),
191     ("avx512vbmi", Some(sym::avx512_target_feature)),
192     ("avx512vl", Some(sym::avx512_target_feature)),
193     ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
194     ("bmi1", None),
195     ("bmi2", None),
196     ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
197     ("f16c", Some(sym::f16c_target_feature)),
198     ("fma", None),
199     ("fxsr", None),
200     ("lzcnt", None),
201     ("mmx", Some(sym::mmx_target_feature)),
202     ("movbe", Some(sym::movbe_target_feature)),
203     ("pclmulqdq", None),
204     ("popcnt", None),
205     ("rdrand", None),
206     ("rdseed", None),
207     ("rtm", Some(sym::rtm_target_feature)),
208     ("sha", None),
209     ("sse", None),
210     ("sse2", None),
211     ("sse3", None),
212     ("sse4.1", None),
213     ("sse4.2", None),
214     ("sse4a", Some(sym::sse4a_target_feature)),
215     ("ssse3", None),
216     ("tbm", Some(sym::tbm_target_feature)),
217     ("xsave", None),
218     ("xsavec", None),
219     ("xsaveopt", None),
220     ("xsaves", None),
221 ];
222
223 const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
224     ("hvx", Some(sym::hexagon_target_feature)),
225     ("hvx-length128b", Some(sym::hexagon_target_feature)),
226 ];
227
228 const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
229     ("altivec", Some(sym::powerpc_target_feature)),
230     ("power8-altivec", Some(sym::powerpc_target_feature)),
231     ("power9-altivec", Some(sym::powerpc_target_feature)),
232     ("power8-vector", Some(sym::powerpc_target_feature)),
233     ("power9-vector", Some(sym::powerpc_target_feature)),
234     ("vsx", Some(sym::powerpc_target_feature)),
235 ];
236
237 const MIPS_WHITELIST: &[(&str, Option<Symbol>)] =
238     &[("fp64", Some(sym::mips_target_feature)), ("msa", Some(sym::mips_target_feature))];
239
240 const RISCV_WHITELIST: &[(&str, Option<Symbol>)] = &[
241     ("m", Some(sym::riscv_target_feature)),
242     ("a", Some(sym::riscv_target_feature)),
243     ("c", Some(sym::riscv_target_feature)),
244     ("f", Some(sym::riscv_target_feature)),
245     ("d", Some(sym::riscv_target_feature)),
246     ("e", Some(sym::riscv_target_feature)),
247 ];
248
249 const WASM_WHITELIST: &[(&str, Option<Symbol>)] =
250     &[("simd128", Some(sym::wasm_target_feature)), ("atomics", Some(sym::wasm_target_feature))];
251
252 /// When rustdoc is running, provide a list of all known features so that all their respective
253 /// primitives may be documented.
254 ///
255 /// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
256 /// iterator!
257 pub fn all_known_features() -> impl Iterator<Item = (&'static str, Option<Symbol>)> {
258     ARM_WHITELIST
259         .iter()
260         .cloned()
261         .chain(AARCH64_WHITELIST.iter().cloned())
262         .chain(X86_WHITELIST.iter().cloned())
263         .chain(HEXAGON_WHITELIST.iter().cloned())
264         .chain(POWERPC_WHITELIST.iter().cloned())
265         .chain(MIPS_WHITELIST.iter().cloned())
266         .chain(RISCV_WHITELIST.iter().cloned())
267         .chain(WASM_WHITELIST.iter().cloned())
268 }
269
270 pub fn to_llvm_feature<'a>(sess: &Session, s: &'a str) -> &'a str {
271     let arch = if sess.target.target.arch == "x86_64" { "x86" } else { &*sess.target.target.arch };
272     match (arch, s) {
273         ("x86", "pclmulqdq") => "pclmul",
274         ("x86", "rdrand") => "rdrnd",
275         ("x86", "bmi1") => "bmi",
276         ("x86", "cmpxchg16b") => "cx16",
277         ("aarch64", "fp") => "fp-armv8",
278         ("aarch64", "fp16") => "fullfp16",
279         (_, s) => s,
280     }
281 }
282
283 pub fn target_features(sess: &Session) -> Vec<Symbol> {
284     let target_machine = create_informational_target_machine(sess);
285     target_feature_whitelist(sess)
286         .iter()
287         .filter_map(|&(feature, gate)| {
288             if UnstableFeatures::from_environment().is_nightly_build() || gate.is_none() {
289                 Some(feature)
290             } else {
291                 None
292             }
293         })
294         .filter(|feature| {
295             let llvm_feature = to_llvm_feature(sess, feature);
296             let cstr = CString::new(llvm_feature).unwrap();
297             unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
298         })
299         .map(|feature| Symbol::intern(feature))
300         .collect()
301 }
302
303 pub fn target_feature_whitelist(sess: &Session) -> &'static [(&'static str, Option<Symbol>)] {
304     match &*sess.target.target.arch {
305         "arm" => ARM_WHITELIST,
306         "aarch64" => AARCH64_WHITELIST,
307         "x86" | "x86_64" => X86_WHITELIST,
308         "hexagon" => HEXAGON_WHITELIST,
309         "mips" | "mips64" => MIPS_WHITELIST,
310         "powerpc" | "powerpc64" => POWERPC_WHITELIST,
311         "riscv32" | "riscv64" => RISCV_WHITELIST,
312         "wasm32" => WASM_WHITELIST,
313         _ => &[],
314     }
315 }
316
317 pub fn print_version() {
318     // Can be called without initializing LLVM
319     unsafe {
320         println!("LLVM version: {}.{}", llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
321     }
322 }
323
324 pub fn get_major_version() -> u32 {
325     unsafe { llvm::LLVMRustVersionMajor() }
326 }
327
328 pub fn print_passes() {
329     // Can be called without initializing LLVM
330     unsafe {
331         llvm::LLVMRustPrintPasses();
332     }
333 }
334
335 pub(crate) fn print(req: PrintRequest, sess: &Session) {
336     require_inited();
337     let tm = create_informational_target_machine(sess);
338     unsafe {
339         match req {
340             PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
341             PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
342             _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
343         }
344     }
345 }
346
347 pub fn target_cpu(sess: &Session) -> &str {
348     let name = match sess.opts.cg.target_cpu {
349         Some(ref s) => &**s,
350         None => &*sess.target.target.options.cpu,
351     };
352     if name != "native" {
353         return name;
354     }
355
356     unsafe {
357         let mut len = 0;
358         let ptr = llvm::LLVMRustGetHostCPUName(&mut len);
359         str::from_utf8(slice::from_raw_parts(ptr as *const u8, len)).unwrap()
360     }
361 }