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[rust.git] / src / librustc_codegen_llvm / llvm_util.rs
1 use crate::back::write::create_informational_target_machine;
2 use crate::llvm;
3 use syntax_pos::symbol::Symbol;
4 use rustc::session::Session;
5 use rustc::session::config::PrintRequest;
6 use rustc_target::spec::{MergeFunctions, PanicStrategy};
7 use libc::c_int;
8 use std::ffi::CString;
9 use syntax::feature_gate::UnstableFeatures;
10 use syntax::symbol::sym;
11
12 use std::str;
13 use std::slice;
14 use std::sync::atomic::{AtomicBool, Ordering};
15 use std::sync::Once;
16
17 static POISONED: AtomicBool = AtomicBool::new(false);
18 static INIT: Once = Once::new();
19
20 pub(crate) fn init(sess: &Session) {
21     unsafe {
22         // Before we touch LLVM, make sure that multithreading is enabled.
23         INIT.call_once(|| {
24             if llvm::LLVMStartMultithreaded() != 1 {
25                 // use an extra bool to make sure that all future usage of LLVM
26                 // cannot proceed despite the Once not running more than once.
27                 POISONED.store(true, Ordering::SeqCst);
28             }
29
30             configure_llvm(sess);
31         });
32
33         if POISONED.load(Ordering::SeqCst) {
34             bug!("couldn't enable multi-threaded LLVM");
35         }
36     }
37 }
38
39 fn require_inited() {
40     INIT.call_once(|| bug!("llvm is not initialized"));
41     if POISONED.load(Ordering::SeqCst) {
42         bug!("couldn't enable multi-threaded LLVM");
43     }
44 }
45
46 unsafe fn configure_llvm(sess: &Session) {
47     let n_args = sess.opts.cg.llvm_args.len();
48     let mut llvm_c_strs = Vec::with_capacity(n_args + 1);
49     let mut llvm_args = Vec::with_capacity(n_args + 1);
50
51     llvm::LLVMRustInstallFatalErrorHandler();
52
53     {
54         let mut add = |arg: &str| {
55             let s = CString::new(arg).unwrap();
56             llvm_args.push(s.as_ptr());
57             llvm_c_strs.push(s);
58         };
59         add("rustc"); // fake program name
60         if sess.time_llvm_passes() { add("-time-passes"); }
61         if sess.print_llvm_passes() { add("-debug-pass=Structure"); }
62         if sess.opts.debugging_opts.disable_instrumentation_preinliner {
63             add("-disable-preinline");
64         }
65         if sess.opts.debugging_opts.generate_arange_section {
66             add("-generate-arange-section");
67         }
68         if get_major_version() >= 8 {
69             match sess.opts.debugging_opts.merge_functions
70                   .unwrap_or(sess.target.target.options.merge_functions) {
71                 MergeFunctions::Disabled |
72                 MergeFunctions::Trampolines => {}
73                 MergeFunctions::Aliases => {
74                     add("-mergefunc-use-aliases");
75                 }
76             }
77         }
78
79         if sess.target.target.target_os == "emscripten" &&
80             sess.panic_strategy() == PanicStrategy::Unwind {
81             add("-enable-emscripten-cxx-exceptions");
82         }
83
84         // HACK(eddyb) LLVM inserts `llvm.assume` calls to preserve align attributes
85         // during inlining. Unfortunately these may block other optimizations.
86         add("-preserve-alignment-assumptions-during-inlining=false");
87
88         for arg in &sess.opts.cg.llvm_args {
89             add(&(*arg));
90         }
91     }
92
93     llvm::LLVMInitializePasses();
94
95     ::rustc_llvm::initialize_available_targets();
96
97     llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int,
98                                  llvm_args.as_ptr());
99 }
100
101 // WARNING: the features after applying `to_llvm_feature` must be known
102 // to LLVM or the feature detection code will walk past the end of the feature
103 // array, leading to crashes.
104
105 const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
106     ("aclass", Some(sym::arm_target_feature)),
107     ("mclass", Some(sym::arm_target_feature)),
108     ("rclass", Some(sym::arm_target_feature)),
109     ("dsp", Some(sym::arm_target_feature)),
110     ("neon", Some(sym::arm_target_feature)),
111     ("v5te", Some(sym::arm_target_feature)),
112     ("v6", Some(sym::arm_target_feature)),
113     ("v6k", Some(sym::arm_target_feature)),
114     ("v6t2", Some(sym::arm_target_feature)),
115     ("v7", Some(sym::arm_target_feature)),
116     ("v8", Some(sym::arm_target_feature)),
117     ("vfp2", Some(sym::arm_target_feature)),
118     ("vfp3", Some(sym::arm_target_feature)),
119     ("vfp4", Some(sym::arm_target_feature)),
120 ];
121
122 const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
123     ("fp", Some(sym::aarch64_target_feature)),
124     ("neon", Some(sym::aarch64_target_feature)),
125     ("sve", Some(sym::aarch64_target_feature)),
126     ("crc", Some(sym::aarch64_target_feature)),
127     ("crypto", Some(sym::aarch64_target_feature)),
128     ("ras", Some(sym::aarch64_target_feature)),
129     ("lse", Some(sym::aarch64_target_feature)),
130     ("rdm", Some(sym::aarch64_target_feature)),
131     ("fp16", Some(sym::aarch64_target_feature)),
132     ("rcpc", Some(sym::aarch64_target_feature)),
133     ("dotprod", Some(sym::aarch64_target_feature)),
134     ("v8.1a", Some(sym::aarch64_target_feature)),
135     ("v8.2a", Some(sym::aarch64_target_feature)),
136     ("v8.3a", Some(sym::aarch64_target_feature)),
137 ];
138
139 const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
140     ("adx", Some(sym::adx_target_feature)),
141     ("aes", None),
142     ("avx", None),
143     ("avx2", None),
144     ("avx512bw", Some(sym::avx512_target_feature)),
145     ("avx512cd", Some(sym::avx512_target_feature)),
146     ("avx512dq", Some(sym::avx512_target_feature)),
147     ("avx512er", Some(sym::avx512_target_feature)),
148     ("avx512f", Some(sym::avx512_target_feature)),
149     ("avx512ifma", Some(sym::avx512_target_feature)),
150     ("avx512pf", Some(sym::avx512_target_feature)),
151     ("avx512vbmi", Some(sym::avx512_target_feature)),
152     ("avx512vl", Some(sym::avx512_target_feature)),
153     ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
154     ("bmi1", None),
155     ("bmi2", None),
156     ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
157     ("f16c", Some(sym::f16c_target_feature)),
158     ("fma", None),
159     ("fxsr", None),
160     ("lzcnt", None),
161     ("mmx", Some(sym::mmx_target_feature)),
162     ("movbe", Some(sym::movbe_target_feature)),
163     ("pclmulqdq", None),
164     ("popcnt", None),
165     ("rdrand", None),
166     ("rdseed", None),
167     ("rtm", Some(sym::rtm_target_feature)),
168     ("sha", None),
169     ("sse", None),
170     ("sse2", None),
171     ("sse3", None),
172     ("sse4.1", None),
173     ("sse4.2", None),
174     ("sse4a", Some(sym::sse4a_target_feature)),
175     ("ssse3", None),
176     ("tbm", Some(sym::tbm_target_feature)),
177     ("xsave", None),
178     ("xsavec", None),
179     ("xsaveopt", None),
180     ("xsaves", None),
181 ];
182
183 const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
184     ("hvx", Some(sym::hexagon_target_feature)),
185     ("hvx-length128b", Some(sym::hexagon_target_feature)),
186 ];
187
188 const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
189     ("altivec", Some(sym::powerpc_target_feature)),
190     ("power8-altivec", Some(sym::powerpc_target_feature)),
191     ("power9-altivec", Some(sym::powerpc_target_feature)),
192     ("power8-vector", Some(sym::powerpc_target_feature)),
193     ("power9-vector", Some(sym::powerpc_target_feature)),
194     ("vsx", Some(sym::powerpc_target_feature)),
195 ];
196
197 const MIPS_WHITELIST: &[(&str, Option<Symbol>)] = &[
198     ("fp64", Some(sym::mips_target_feature)),
199     ("msa", Some(sym::mips_target_feature)),
200 ];
201
202 const WASM_WHITELIST: &[(&str, Option<Symbol>)] = &[
203     ("simd128", Some(sym::wasm_target_feature)),
204     ("atomics", Some(sym::wasm_target_feature)),
205 ];
206
207 /// When rustdoc is running, provide a list of all known features so that all their respective
208 /// primitives may be documented.
209 ///
210 /// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
211 /// iterator!
212 pub fn all_known_features() -> impl Iterator<Item=(&'static str, Option<Symbol>)> {
213     ARM_WHITELIST.iter().cloned()
214         .chain(AARCH64_WHITELIST.iter().cloned())
215         .chain(X86_WHITELIST.iter().cloned())
216         .chain(HEXAGON_WHITELIST.iter().cloned())
217         .chain(POWERPC_WHITELIST.iter().cloned())
218         .chain(MIPS_WHITELIST.iter().cloned())
219         .chain(WASM_WHITELIST.iter().cloned())
220 }
221
222 pub fn to_llvm_feature<'a>(sess: &Session, s: &'a str) -> &'a str {
223     let arch = if sess.target.target.arch == "x86_64" {
224         "x86"
225     } else {
226         &*sess.target.target.arch
227     };
228     match (arch, s) {
229         ("x86", "pclmulqdq") => "pclmul",
230         ("x86", "rdrand") => "rdrnd",
231         ("x86", "bmi1") => "bmi",
232         ("x86", "cmpxchg16b") => "cx16",
233         ("aarch64", "fp") => "fp-armv8",
234         ("aarch64", "fp16") => "fullfp16",
235         (_, s) => s,
236     }
237 }
238
239 pub fn target_features(sess: &Session) -> Vec<Symbol> {
240     let target_machine = create_informational_target_machine(sess, true);
241     target_feature_whitelist(sess)
242         .iter()
243         .filter_map(|&(feature, gate)| {
244             if UnstableFeatures::from_environment().is_nightly_build() || gate.is_none() {
245                 Some(feature)
246             } else {
247                 None
248             }
249         })
250         .filter(|feature| {
251             let llvm_feature = to_llvm_feature(sess, feature);
252             let cstr = CString::new(llvm_feature).unwrap();
253             unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
254         })
255         .map(|feature| Symbol::intern(feature)).collect()
256 }
257
258 pub fn target_feature_whitelist(sess: &Session)
259     -> &'static [(&'static str, Option<Symbol>)]
260 {
261     match &*sess.target.target.arch {
262         "arm" => ARM_WHITELIST,
263         "aarch64" => AARCH64_WHITELIST,
264         "x86" | "x86_64" => X86_WHITELIST,
265         "hexagon" => HEXAGON_WHITELIST,
266         "mips" | "mips64" => MIPS_WHITELIST,
267         "powerpc" | "powerpc64" => POWERPC_WHITELIST,
268         "wasm32" => WASM_WHITELIST,
269         _ => &[],
270     }
271 }
272
273 pub fn print_version() {
274     // Can be called without initializing LLVM
275     unsafe {
276         println!("LLVM version: {}.{}",
277                  llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
278     }
279 }
280
281 pub fn get_major_version() -> u32 {
282     unsafe { llvm::LLVMRustVersionMajor() }
283 }
284
285 pub fn print_passes() {
286     // Can be called without initializing LLVM
287     unsafe { llvm::LLVMRustPrintPasses(); }
288 }
289
290 pub(crate) fn print(req: PrintRequest, sess: &Session) {
291     require_inited();
292     let tm = create_informational_target_machine(sess, true);
293     unsafe {
294         match req {
295             PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
296             PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
297             _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
298         }
299     }
300 }
301
302 pub fn target_cpu(sess: &Session) -> &str {
303     let name = match sess.opts.cg.target_cpu {
304         Some(ref s) => &**s,
305         None => &*sess.target.target.options.cpu
306     };
307     if name != "native" {
308         return name
309     }
310
311     unsafe {
312         let mut len = 0;
313         let ptr = llvm::LLVMRustGetHostCPUName(&mut len);
314         str::from_utf8(slice::from_raw_parts(ptr as *const u8, len)).unwrap()
315     }
316 }