1 use crate::back::write::create_informational_target_machine;
3 use syntax_pos::symbol::Symbol;
4 use rustc::session::Session;
5 use rustc::session::config::PrintRequest;
6 use rustc_target::spec::MergeFunctions;
9 use syntax::feature_gate::UnstableFeatures;
10 use syntax::symbol::sym;
14 use std::sync::atomic::{AtomicBool, Ordering};
17 static POISONED: AtomicBool = AtomicBool::new(false);
18 static INIT: Once = Once::new();
20 pub(crate) fn init(sess: &Session) {
22 // Before we touch LLVM, make sure that multithreading is enabled.
24 if llvm::LLVMStartMultithreaded() != 1 {
25 // use an extra bool to make sure that all future usage of LLVM
26 // cannot proceed despite the Once not running more than once.
27 POISONED.store(true, Ordering::SeqCst);
33 if POISONED.load(Ordering::SeqCst) {
34 bug!("couldn't enable multi-threaded LLVM");
40 INIT.call_once(|| bug!("llvm is not initialized"));
41 if POISONED.load(Ordering::SeqCst) {
42 bug!("couldn't enable multi-threaded LLVM");
46 unsafe fn configure_llvm(sess: &Session) {
47 let n_args = sess.opts.cg.llvm_args.len();
48 let mut llvm_c_strs = Vec::with_capacity(n_args + 1);
49 let mut llvm_args = Vec::with_capacity(n_args + 1);
51 llvm::LLVMRustInstallFatalErrorHandler();
54 let mut add = |arg: &str| {
55 let s = CString::new(arg).unwrap();
56 llvm_args.push(s.as_ptr());
59 add("rustc"); // fake program name
60 if sess.time_llvm_passes() { add("-time-passes"); }
61 if sess.print_llvm_passes() { add("-debug-pass=Structure"); }
62 if sess.opts.debugging_opts.disable_instrumentation_preinliner {
63 add("-disable-preinline");
65 if get_major_version() >= 8 {
66 match sess.opts.debugging_opts.merge_functions
67 .unwrap_or(sess.target.target.options.merge_functions) {
68 MergeFunctions::Disabled |
69 MergeFunctions::Trampolines => {}
70 MergeFunctions::Aliases => {
71 add("-mergefunc-use-aliases");
76 // HACK(eddyb) LLVM inserts `llvm.assume` calls to preserve align attributes
77 // during inlining. Unfortunately these may block other optimizations.
78 add("-preserve-alignment-assumptions-during-inlining=false");
80 for arg in &sess.opts.cg.llvm_args {
85 llvm::LLVMInitializePasses();
87 ::rustc_llvm::initialize_available_targets();
89 llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int,
93 // WARNING: the features after applying `to_llvm_feature` must be known
94 // to LLVM or the feature detection code will walk past the end of the feature
95 // array, leading to crashes.
97 const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
98 ("aclass", Some(sym::arm_target_feature)),
99 ("mclass", Some(sym::arm_target_feature)),
100 ("rclass", Some(sym::arm_target_feature)),
101 ("dsp", Some(sym::arm_target_feature)),
102 ("neon", Some(sym::arm_target_feature)),
103 ("v5te", Some(sym::arm_target_feature)),
104 ("v6", Some(sym::arm_target_feature)),
105 ("v6k", Some(sym::arm_target_feature)),
106 ("v6t2", Some(sym::arm_target_feature)),
107 ("v7", Some(sym::arm_target_feature)),
108 ("v8", Some(sym::arm_target_feature)),
109 ("vfp2", Some(sym::arm_target_feature)),
110 ("vfp3", Some(sym::arm_target_feature)),
111 ("vfp4", Some(sym::arm_target_feature)),
114 const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
115 ("fp", Some(sym::aarch64_target_feature)),
116 ("neon", Some(sym::aarch64_target_feature)),
117 ("sve", Some(sym::aarch64_target_feature)),
118 ("crc", Some(sym::aarch64_target_feature)),
119 ("crypto", Some(sym::aarch64_target_feature)),
120 ("ras", Some(sym::aarch64_target_feature)),
121 ("lse", Some(sym::aarch64_target_feature)),
122 ("rdm", Some(sym::aarch64_target_feature)),
123 ("fp16", Some(sym::aarch64_target_feature)),
124 ("rcpc", Some(sym::aarch64_target_feature)),
125 ("dotprod", Some(sym::aarch64_target_feature)),
126 ("v8.1a", Some(sym::aarch64_target_feature)),
127 ("v8.2a", Some(sym::aarch64_target_feature)),
128 ("v8.3a", Some(sym::aarch64_target_feature)),
131 const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
132 ("adx", Some(sym::adx_target_feature)),
136 ("avx512bw", Some(sym::avx512_target_feature)),
137 ("avx512cd", Some(sym::avx512_target_feature)),
138 ("avx512dq", Some(sym::avx512_target_feature)),
139 ("avx512er", Some(sym::avx512_target_feature)),
140 ("avx512f", Some(sym::avx512_target_feature)),
141 ("avx512ifma", Some(sym::avx512_target_feature)),
142 ("avx512pf", Some(sym::avx512_target_feature)),
143 ("avx512vbmi", Some(sym::avx512_target_feature)),
144 ("avx512vl", Some(sym::avx512_target_feature)),
145 ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
148 ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
149 ("f16c", Some(sym::f16c_target_feature)),
153 ("mmx", Some(sym::mmx_target_feature)),
154 ("movbe", Some(sym::movbe_target_feature)),
159 ("rtm", Some(sym::rtm_target_feature)),
166 ("sse4a", Some(sym::sse4a_target_feature)),
168 ("tbm", Some(sym::tbm_target_feature)),
175 const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
176 ("hvx", Some(sym::hexagon_target_feature)),
177 ("hvx-double", Some(sym::hexagon_target_feature)),
180 const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
181 ("altivec", Some(sym::powerpc_target_feature)),
182 ("power8-altivec", Some(sym::powerpc_target_feature)),
183 ("power9-altivec", Some(sym::powerpc_target_feature)),
184 ("power8-vector", Some(sym::powerpc_target_feature)),
185 ("power9-vector", Some(sym::powerpc_target_feature)),
186 ("vsx", Some(sym::powerpc_target_feature)),
189 const MIPS_WHITELIST: &[(&str, Option<Symbol>)] = &[
190 ("fp64", Some(sym::mips_target_feature)),
191 ("msa", Some(sym::mips_target_feature)),
194 const WASM_WHITELIST: &[(&str, Option<Symbol>)] = &[
195 ("simd128", Some(sym::wasm_target_feature)),
196 ("atomics", Some(sym::wasm_target_feature)),
199 /// When rustdoc is running, provide a list of all known features so that all their respective
200 /// primitives may be documented.
202 /// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
204 pub fn all_known_features() -> impl Iterator<Item=(&'static str, Option<Symbol>)> {
205 ARM_WHITELIST.iter().cloned()
206 .chain(AARCH64_WHITELIST.iter().cloned())
207 .chain(X86_WHITELIST.iter().cloned())
208 .chain(HEXAGON_WHITELIST.iter().cloned())
209 .chain(POWERPC_WHITELIST.iter().cloned())
210 .chain(MIPS_WHITELIST.iter().cloned())
211 .chain(WASM_WHITELIST.iter().cloned())
214 pub fn to_llvm_feature<'a>(sess: &Session, s: &'a str) -> &'a str {
215 let arch = if sess.target.target.arch == "x86_64" {
218 &*sess.target.target.arch
221 ("x86", "pclmulqdq") => "pclmul",
222 ("x86", "rdrand") => "rdrnd",
223 ("x86", "bmi1") => "bmi",
224 ("x86", "cmpxchg16b") => "cx16",
225 ("aarch64", "fp") => "fp-armv8",
226 ("aarch64", "fp16") => "fullfp16",
231 pub fn target_features(sess: &Session) -> Vec<Symbol> {
232 let target_machine = create_informational_target_machine(sess, true);
233 target_feature_whitelist(sess)
235 .filter_map(|&(feature, gate)| {
236 if UnstableFeatures::from_environment().is_nightly_build() || gate.is_none() {
243 let llvm_feature = to_llvm_feature(sess, feature);
244 let cstr = CString::new(llvm_feature).unwrap();
245 unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
247 .map(|feature| Symbol::intern(feature)).collect()
250 pub fn target_feature_whitelist(sess: &Session)
251 -> &'static [(&'static str, Option<Symbol>)]
253 match &*sess.target.target.arch {
254 "arm" => ARM_WHITELIST,
255 "aarch64" => AARCH64_WHITELIST,
256 "x86" | "x86_64" => X86_WHITELIST,
257 "hexagon" => HEXAGON_WHITELIST,
258 "mips" | "mips64" => MIPS_WHITELIST,
259 "powerpc" | "powerpc64" => POWERPC_WHITELIST,
260 // wasm32 on emscripten does not support these target features
261 "wasm32" if !sess.target.target.options.is_like_emscripten => WASM_WHITELIST,
266 pub fn print_version() {
267 // Can be called without initializing LLVM
269 println!("LLVM version: {}.{}",
270 llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
274 pub fn get_major_version() -> u32 {
275 unsafe { llvm::LLVMRustVersionMajor() }
278 pub fn print_passes() {
279 // Can be called without initializing LLVM
280 unsafe { llvm::LLVMRustPrintPasses(); }
283 pub(crate) fn print(req: PrintRequest, sess: &Session) {
285 let tm = create_informational_target_machine(sess, true);
288 PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
289 PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
290 _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
295 pub fn target_cpu(sess: &Session) -> &str {
296 let name = match sess.opts.cg.target_cpu {
298 None => &*sess.target.target.options.cpu
300 if name != "native" {
306 let ptr = llvm::LLVMRustGetHostCPUName(&mut len);
307 str::from_utf8(slice::from_raw_parts(ptr as *const u8, len)).unwrap()