src/librustc_codegen_llvm/llvm_util.rs

   1 use crate::back::write::create_informational_target_machine;
   2 use crate::llvm;
   3 use libc::c_int;
   4 use rustc::bug;
   5 use rustc::session::config::PrintRequest;
   6 use rustc::session::Session;
   7 use rustc_data_structures::fx::FxHashSet;
   8 use rustc_feature::UnstableFeatures;
   9 use rustc_span::symbol::sym;
  10 use rustc_span::symbol::Symbol;
  11 use rustc_target::spec::{MergeFunctions, PanicStrategy};
  12 use std::ffi::CString;
  13
  14 use std::slice;
  15 use std::str;
  16 use std::sync::atomic::{AtomicBool, Ordering};
  17 use std::sync::Once;
  18
  19 static POISONED: AtomicBool = AtomicBool::new(false);
  20 static INIT: Once = Once::new();
  21
  22 pub(crate) fn init(sess: &Session) {
  23     unsafe {
  24         // Before we touch LLVM, make sure that multithreading is enabled.
  25         INIT.call_once(|| {
  26             if llvm::LLVMStartMultithreaded() != 1 {
  27                 // use an extra bool to make sure that all future usage of LLVM
  28                 // cannot proceed despite the Once not running more than once.
  29                 POISONED.store(true, Ordering::SeqCst);
  30             }
  31
  32             configure_llvm(sess);
  33         });
  34
  35         if POISONED.load(Ordering::SeqCst) {
  36             bug!("couldn't enable multi-threaded LLVM");
  37         }
  38     }
  39 }
  40
  41 fn require_inited() {
  42     INIT.call_once(|| bug!("llvm is not initialized"));
  43     if POISONED.load(Ordering::SeqCst) {
  44         bug!("couldn't enable multi-threaded LLVM");
  45     }
  46 }
  47
  48 unsafe fn configure_llvm(sess: &Session) {
  49     let n_args = sess.opts.cg.llvm_args.len() + sess.target.target.options.llvm_args.len();
  50     let mut llvm_c_strs = Vec::with_capacity(n_args + 1);
  51     let mut llvm_args = Vec::with_capacity(n_args + 1);
  52
  53     llvm::LLVMRustInstallFatalErrorHandler();
  54
  55     fn llvm_arg_to_arg_name(full_arg: &str) -> &str {
  56         full_arg.trim().split(|c: char| c == '=' || c.is_whitespace()).next().unwrap_or("")
  57     }
  58
  59     let cg_opts = sess.opts.cg.llvm_args.iter();
  60     let tg_opts = sess.target.target.options.llvm_args.iter();
  61     let sess_args = cg_opts.chain(tg_opts);
  62
  63     let user_specified_args: FxHashSet<_> =
  64         sess_args.clone().map(|s| llvm_arg_to_arg_name(s)).filter(|s| !s.is_empty()).collect();
  65
  66     {
  67         // This adds the given argument to LLVM. Unless `force` is true
  68         // user specified arguments are *not* overridden.
  69         let mut add = |arg: &str, force: bool| {
  70             if force || !user_specified_args.contains(llvm_arg_to_arg_name(arg)) {
  71                 let s = CString::new(arg).unwrap();
  72                 llvm_args.push(s.as_ptr());
  73                 llvm_c_strs.push(s);
  74             }
  75         };
  76         add("rustc", true); // fake program name
  77         if sess.time_llvm_passes() {
  78             add("-time-passes", false);
  79         }
  80         if sess.print_llvm_passes() {
  81             add("-debug-pass=Structure", false);
  82         }
  83
  84         if sess.opts.debugging_opts.generate_arange_section {
  85             add("-generate-arange-section", false);
  86         }
  87         if get_major_version() >= 8 {
  88             match sess
  89                 .opts
  90                 .debugging_opts
  91                 .merge_functions
  92                 .unwrap_or(sess.target.target.options.merge_functions)
  93             {
  94                 MergeFunctions::Disabled | MergeFunctions::Trampolines => {}
  95                 MergeFunctions::Aliases => {
  96                     add("-mergefunc-use-aliases", false);
  97                 }
  98             }
  99         }
 100
 101         if sess.target.target.target_os == "emscripten"
 102             && sess.panic_strategy() == PanicStrategy::Unwind
 103         {
 104             add("-enable-emscripten-cxx-exceptions", false);
 105         }
 106
 107         // HACK(eddyb) LLVM inserts `llvm.assume` calls to preserve align attributes
 108         // during inlining. Unfortunately these may block other optimizations.
 109         add("-preserve-alignment-assumptions-during-inlining=false", false);
 110
 111         for arg in sess_args {
 112             add(&(*arg), true);
 113         }
 114     }
 115
 116     if sess.opts.debugging_opts.llvm_time_trace && get_major_version() >= 9 {
 117         // time-trace is not thread safe and running it in parallel will cause seg faults.
 118         if !sess.opts.debugging_opts.no_parallel_llvm {
 119             bug!("`-Z llvm-time-trace` requires `-Z no-parallel-llvm")
 120         }
 121
 122         llvm::LLVMTimeTraceProfilerInitialize();
 123     }
 124
 125     llvm::LLVMInitializePasses();
 126
 127     ::rustc_llvm::initialize_available_targets();
 128
 129     llvm::LLVMRustSetLLVMOptions(llvm_args.len() as c_int, llvm_args.as_ptr());
 130 }
 131
 132 pub fn time_trace_profiler_finish(file_name: &str) {
 133     unsafe {
 134         if get_major_version() >= 9 {
 135             let file_name = CString::new(file_name).unwrap();
 136             llvm::LLVMTimeTraceProfilerFinish(file_name.as_ptr());
 137         }
 138     }
 139 }
 140
 141 // WARNING: the features after applying `to_llvm_feature` must be known
 142 // to LLVM or the feature detection code will walk past the end of the feature
 143 // array, leading to crashes.
 144
 145 const ARM_WHITELIST: &[(&str, Option<Symbol>)] = &[
 146     ("aclass", Some(sym::arm_target_feature)),
 147     ("mclass", Some(sym::arm_target_feature)),
 148     ("rclass", Some(sym::arm_target_feature)),
 149     ("dsp", Some(sym::arm_target_feature)),
 150     ("neon", Some(sym::arm_target_feature)),
 151     ("crc", Some(sym::arm_target_feature)),
 152     ("crypto", Some(sym::arm_target_feature)),
 153     ("v5te", Some(sym::arm_target_feature)),
 154     ("v6", Some(sym::arm_target_feature)),
 155     ("v6k", Some(sym::arm_target_feature)),
 156     ("v6t2", Some(sym::arm_target_feature)),
 157     ("v7", Some(sym::arm_target_feature)),
 158     ("v8", Some(sym::arm_target_feature)),
 159     ("vfp2", Some(sym::arm_target_feature)),
 160     ("vfp3", Some(sym::arm_target_feature)),
 161     ("vfp4", Some(sym::arm_target_feature)),
 162 ];
 163
 164 const AARCH64_WHITELIST: &[(&str, Option<Symbol>)] = &[
 165     ("fp", Some(sym::aarch64_target_feature)),
 166     ("neon", Some(sym::aarch64_target_feature)),
 167     ("sve", Some(sym::aarch64_target_feature)),
 168     ("crc", Some(sym::aarch64_target_feature)),
 169     ("crypto", Some(sym::aarch64_target_feature)),
 170     ("ras", Some(sym::aarch64_target_feature)),
 171     ("lse", Some(sym::aarch64_target_feature)),
 172     ("rdm", Some(sym::aarch64_target_feature)),
 173     ("fp16", Some(sym::aarch64_target_feature)),
 174     ("rcpc", Some(sym::aarch64_target_feature)),
 175     ("dotprod", Some(sym::aarch64_target_feature)),
 176     ("v8.1a", Some(sym::aarch64_target_feature)),
 177     ("v8.2a", Some(sym::aarch64_target_feature)),
 178     ("v8.3a", Some(sym::aarch64_target_feature)),
 179 ];
 180
 181 const X86_WHITELIST: &[(&str, Option<Symbol>)] = &[
 182     ("adx", Some(sym::adx_target_feature)),
 183     ("aes", None),
 184     ("avx", None),
 185     ("avx2", None),
 186     ("avx512bw", Some(sym::avx512_target_feature)),
 187     ("avx512cd", Some(sym::avx512_target_feature)),
 188     ("avx512dq", Some(sym::avx512_target_feature)),
 189     ("avx512er", Some(sym::avx512_target_feature)),
 190     ("avx512f", Some(sym::avx512_target_feature)),
 191     ("avx512ifma", Some(sym::avx512_target_feature)),
 192     ("avx512pf", Some(sym::avx512_target_feature)),
 193     ("avx512vbmi", Some(sym::avx512_target_feature)),
 194     ("avx512vl", Some(sym::avx512_target_feature)),
 195     ("avx512vpopcntdq", Some(sym::avx512_target_feature)),
 196     ("bmi1", None),
 197     ("bmi2", None),
 198     ("cmpxchg16b", Some(sym::cmpxchg16b_target_feature)),
 199     ("f16c", Some(sym::f16c_target_feature)),
 200     ("fma", None),
 201     ("fxsr", None),
 202     ("lzcnt", None),
 203     ("mmx", Some(sym::mmx_target_feature)),
 204     ("movbe", Some(sym::movbe_target_feature)),
 205     ("pclmulqdq", None),
 206     ("popcnt", None),
 207     ("rdrand", None),
 208     ("rdseed", None),
 209     ("rtm", Some(sym::rtm_target_feature)),
 210     ("sha", None),
 211     ("sse", None),
 212     ("sse2", None),
 213     ("sse3", None),
 214     ("sse4.1", None),
 215     ("sse4.2", None),
 216     ("sse4a", Some(sym::sse4a_target_feature)),
 217     ("ssse3", None),
 218     ("tbm", Some(sym::tbm_target_feature)),
 219     ("xsave", None),
 220     ("xsavec", None),
 221     ("xsaveopt", None),
 222     ("xsaves", None),
 223 ];
 224
 225 const HEXAGON_WHITELIST: &[(&str, Option<Symbol>)] = &[
 226     ("hvx", Some(sym::hexagon_target_feature)),
 227     ("hvx-length128b", Some(sym::hexagon_target_feature)),
 228 ];
 229
 230 const POWERPC_WHITELIST: &[(&str, Option<Symbol>)] = &[
 231     ("altivec", Some(sym::powerpc_target_feature)),
 232     ("power8-altivec", Some(sym::powerpc_target_feature)),
 233     ("power9-altivec", Some(sym::powerpc_target_feature)),
 234     ("power8-vector", Some(sym::powerpc_target_feature)),
 235     ("power9-vector", Some(sym::powerpc_target_feature)),
 236     ("vsx", Some(sym::powerpc_target_feature)),
 237 ];
 238
 239 const MIPS_WHITELIST: &[(&str, Option<Symbol>)] =
 240     &[("fp64", Some(sym::mips_target_feature)), ("msa", Some(sym::mips_target_feature))];
 241
 242 const WASM_WHITELIST: &[(&str, Option<Symbol>)] =
 243     &[("simd128", Some(sym::wasm_target_feature)), ("atomics", Some(sym::wasm_target_feature))];
 244
 245 /// When rustdoc is running, provide a list of all known features so that all their respective
 246 /// primitives may be documented.
 247 ///
 248 /// IMPORTANT: If you're adding another whitelist to the above lists, make sure to add it to this
 249 /// iterator!
 250 pub fn all_known_features() -> impl Iterator<Item = (&'static str, Option<Symbol>)> {
 251     ARM_WHITELIST
 252         .iter()
 253         .cloned()
 254         .chain(AARCH64_WHITELIST.iter().cloned())
 255         .chain(X86_WHITELIST.iter().cloned())
 256         .chain(HEXAGON_WHITELIST.iter().cloned())
 257         .chain(POWERPC_WHITELIST.iter().cloned())
 258         .chain(MIPS_WHITELIST.iter().cloned())
 259         .chain(WASM_WHITELIST.iter().cloned())
 260 }
 261
 262 pub fn to_llvm_feature<'a>(sess: &Session, s: &'a str) -> &'a str {
 263     let arch = if sess.target.target.arch == "x86_64" { "x86" } else { &*sess.target.target.arch };
 264     match (arch, s) {
 265         ("x86", "pclmulqdq") => "pclmul",
 266         ("x86", "rdrand") => "rdrnd",
 267         ("x86", "bmi1") => "bmi",
 268         ("x86", "cmpxchg16b") => "cx16",
 269         ("aarch64", "fp") => "fp-armv8",
 270         ("aarch64", "fp16") => "fullfp16",
 271         (_, s) => s,
 272     }
 273 }
 274
 275 pub fn target_features(sess: &Session) -> Vec<Symbol> {
 276     let target_machine = create_informational_target_machine(sess, true);
 277     target_feature_whitelist(sess)
 278         .iter()
 279         .filter_map(|&(feature, gate)| {
 280             if UnstableFeatures::from_environment().is_nightly_build() || gate.is_none() {
 281                 Some(feature)
 282             } else {
 283                 None
 284             }
 285         })
 286         .filter(|feature| {
 287             let llvm_feature = to_llvm_feature(sess, feature);
 288             let cstr = CString::new(llvm_feature).unwrap();
 289             unsafe { llvm::LLVMRustHasFeature(target_machine, cstr.as_ptr()) }
 290         })
 291         .map(|feature| Symbol::intern(feature))
 292         .collect()
 293 }
 294
 295 pub fn target_feature_whitelist(sess: &Session) -> &'static [(&'static str, Option<Symbol>)] {
 296     match &*sess.target.target.arch {
 297         "arm" => ARM_WHITELIST,
 298         "aarch64" => AARCH64_WHITELIST,
 299         "x86" | "x86_64" => X86_WHITELIST,
 300         "hexagon" => HEXAGON_WHITELIST,
 301         "mips" | "mips64" => MIPS_WHITELIST,
 302         "powerpc" | "powerpc64" => POWERPC_WHITELIST,
 303         "wasm32" => WASM_WHITELIST,
 304         _ => &[],
 305     }
 306 }
 307
 308 pub fn print_version() {
 309     // Can be called without initializing LLVM
 310     unsafe {
 311         println!("LLVM version: {}.{}", llvm::LLVMRustVersionMajor(), llvm::LLVMRustVersionMinor());
 312     }
 313 }
 314
 315 pub fn get_major_version() -> u32 {
 316     unsafe { llvm::LLVMRustVersionMajor() }
 317 }
 318
 319 pub fn print_passes() {
 320     // Can be called without initializing LLVM
 321     unsafe {
 322         llvm::LLVMRustPrintPasses();
 323     }
 324 }
 325
 326 pub(crate) fn print(req: PrintRequest, sess: &Session) {
 327     require_inited();
 328     let tm = create_informational_target_machine(sess, true);
 329     unsafe {
 330         match req {
 331             PrintRequest::TargetCPUs => llvm::LLVMRustPrintTargetCPUs(tm),
 332             PrintRequest::TargetFeatures => llvm::LLVMRustPrintTargetFeatures(tm),
 333             _ => bug!("rustc_codegen_llvm can't handle print request: {:?}", req),
 334         }
 335     }
 336 }
 337
 338 pub fn target_cpu(sess: &Session) -> &str {
 339     let name = match sess.opts.cg.target_cpu {
 340         Some(ref s) => &**s,
 341         None => &*sess.target.target.options.cpu,
 342     };
 343     if name != "native" {
 344         return name;
 345     }
 346
 347     unsafe {
 348         let mut len = 0;
 349         let ptr = llvm::LLVMRustGetHostCPUName(&mut len);
 350         str::from_utf8(slice::from_raw_parts(ptr as *const u8, len)).unwrap()
 351     }
 352 }