2 use crate::ops::{Deref, DerefMut};
4 /// Pads and aligns a value to the length of a cache line.
5 #[derive(Clone, Copy, Default, Hash, PartialEq, Eq)]
6 // Starting from Intel's Sandy Bridge, spatial prefetcher is now pulling pairs of 64-byte cache
7 // lines at a time, so we have to align to 128 bytes rather than 64.
10 // - https://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf
11 // - https://github.com/facebook/folly/blob/1b5288e6eea6df074758f877c849b6e73bbb9fbb/folly/lang/Align.h#L107
13 // ARM's big.LITTLE architecture has asymmetric cores and "big" cores have 128-byte cache line size.
16 // - https://www.mono-project.com/news/2016/09/12/arm64-icache/
18 // powerpc64 has 128-byte cache line size.
21 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_ppc64x.go#L9
23 any(target_arch = "x86_64", target_arch = "aarch64", target_arch = "powerpc64",),
26 // arm, mips, mips64, and riscv64 have 32-byte cache line size.
29 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_arm.go#L7
30 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mips.go#L7
31 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mipsle.go#L7
32 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_mips64x.go#L9
33 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_riscv64.go#L7
38 target_arch = "mips64",
39 target_arch = "riscv64",
43 // s390x has 256-byte cache line size.
46 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_s390x.go#L7
47 #[cfg_attr(target_arch = "s390x", repr(align(256)))]
48 // x86 and wasm have 64-byte cache line size.
51 // - https://github.com/golang/go/blob/dda2991c2ea0c5914714469c4defc2562a907230/src/internal/cpu/cpu_x86.go#L9
52 // - https://github.com/golang/go/blob/3dd58676054223962cd915bb0934d1f9f489d4d2/src/internal/cpu/cpu_wasm.go#L7
54 // All others are assumed to have 64-byte cache line size.
57 target_arch = "x86_64",
58 target_arch = "aarch64",
59 target_arch = "powerpc64",
62 target_arch = "mips64",
63 target_arch = "riscv64",
64 target_arch = "s390x",
68 pub struct CachePadded<T> {
72 impl<T> CachePadded<T> {
73 /// Pads and aligns a value to the length of a cache line.
74 pub fn new(value: T) -> CachePadded<T> {
75 CachePadded::<T> { value }
79 impl<T> Deref for CachePadded<T> {
82 fn deref(&self) -> &T {
87 impl<T> DerefMut for CachePadded<T> {
88 fn deref_mut(&mut self) -> &mut T {
93 const SPIN_LIMIT: u32 = 6;
94 const YIELD_LIMIT: u32 = 10;
96 /// Performs exponential backoff in spin loops.
102 /// Creates a new `Backoff`.
103 pub fn new() -> Self {
104 Backoff { step: Cell::new(0) }
107 /// Backs off in a lock-free loop.
109 /// This method should be used when we need to retry an operation because another thread made
113 let step = self.step.get().min(SPIN_LIMIT);
114 for _ in 0..step.pow(2) {
115 crate::hint::spin_loop();
118 if self.step.get() <= SPIN_LIMIT {
119 self.step.set(self.step.get() + 1);
123 /// Backs off in a blocking loop.
125 pub fn snooze(&self) {
126 if self.step.get() <= SPIN_LIMIT {
127 for _ in 0..self.step.get().pow(2) {
128 crate::hint::spin_loop()
131 crate::thread::yield_now();
134 if self.step.get() <= YIELD_LIMIT {
135 self.step.set(self.step.get() + 1);
139 /// Returns `true` if quadratic backoff has completed and blocking the thread is advised.
141 pub fn is_completed(&self) -> bool {
142 self.step.get() > YIELD_LIMIT