compiler/rustc_target/src/spec/thumbv8m_main_none_eabihf.rs

   1 // Targets the Cortex-M33 processor (Armv8-M Mainline architecture profile),
   2 // with the Floating Point extension.
   3
   4 use crate::spec::{Target, TargetOptions};
   5
   6 pub fn target() -> Target {
   7     Target {
   8         llvm_target: "thumbv8m.main-none-eabihf".into(),
   9         pointer_width: 32,
  10         data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
  11         arch: "arm".into(),
  12
  13         options: TargetOptions {
  14             abi: "eabihf".into(),
  15             // If the Floating Point extension is implemented in the Cortex-M33
  16             // processor, the Cortex-M33 Technical Reference Manual states that
  17             // the FPU uses the FPv5 architecture, single-precision instructions
  18             // and 16 D registers.
  19             // These parameters map to the following LLVM features.
  20             features: "+fp-armv8,-fp64,-d32".into(),
  21             max_atomic_width: Some(32),
  22             ..super::thumb_base::opts()
  23         },
  24     }
  25 }