1 // Targets the Cortex-M0, Cortex-M0+ and Cortex-M1 processors (ARMv6-M architecture)
3 use crate::spec::{Target, TargetOptions};
5 pub fn target() -> Target {
7 llvm_target: "thumbv6m-none-eabi".into(),
9 data_layout: "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64".into(),
12 options: TargetOptions {
14 // The ARMv6-M architecture doesn't support unaligned loads/stores so we disable them
15 // with +strict-align.
16 // Also force-enable 32-bit atomics, which allows the use of atomic load/store only.
17 // The resulting atomics are ABI incompatible with atomics backed by libatomic.
18 features: "+strict-align,+atomics-32".into(),
19 // There are no atomic CAS instructions available in the instruction set of the ARMv6-M
22 ..super::thumb_base::opts()