1 use crate::abi::Endian;
2 use crate::spec::{LinkerFlavor, Target, TargetOptions};
4 pub fn target() -> Target {
5 let mut base = super::vxworks_base::opts();
6 base.add_pre_link_args(LinkerFlavor::Gcc, &["-mspe", "--secure-plt"]);
7 base.max_atomic_width = Some(32);
10 llvm_target: "powerpc-unknown-linux-gnuspe".into(),
12 data_layout: "E-m:e-p:32:32-i64:64-n32".into(),
13 arch: "powerpc".into(),
14 options: TargetOptions {
17 // feature msync would disable instruction 'fsync' which is not supported by fsl_p1p2
18 features: "+secure-plt,+msync".into(),