]> git.lizzy.rs Git - rust.git/blob - compiler/rustc_hir_analysis/src/check/intrinsicck.rs
Rollup merge of #101717 - Pointerbender:unsafecell-memory-layout, r=Amanieu
[rust.git] / compiler / rustc_hir_analysis / src / check / intrinsicck.rs
1 use hir::HirId;
2 use rustc_ast::InlineAsmTemplatePiece;
3 use rustc_data_structures::fx::FxHashSet;
4 use rustc_errors::struct_span_err;
5 use rustc_hir as hir;
6 use rustc_index::vec::Idx;
7 use rustc_middle::ty::layout::{LayoutError, SizeSkeleton};
8 use rustc_middle::ty::{self, Article, FloatTy, IntTy, Ty, TyCtxt, TypeVisitable, UintTy};
9 use rustc_session::lint;
10 use rustc_span::{Symbol, DUMMY_SP};
11 use rustc_target::abi::{Pointer, VariantIdx};
12 use rustc_target::asm::{InlineAsmReg, InlineAsmRegClass, InlineAsmRegOrRegClass, InlineAsmType};
13
14 use super::FnCtxt;
15
16 /// If the type is `Option<T>`, it will return `T`, otherwise
17 /// the type itself. Works on most `Option`-like types.
18 fn unpack_option_like<'tcx>(tcx: TyCtxt<'tcx>, ty: Ty<'tcx>) -> Ty<'tcx> {
19     let ty::Adt(def, substs) = *ty.kind() else { return ty };
20
21     if def.variants().len() == 2 && !def.repr().c() && def.repr().int.is_none() {
22         let data_idx;
23
24         let one = VariantIdx::new(1);
25         let zero = VariantIdx::new(0);
26
27         if def.variant(zero).fields.is_empty() {
28             data_idx = one;
29         } else if def.variant(one).fields.is_empty() {
30             data_idx = zero;
31         } else {
32             return ty;
33         }
34
35         if def.variant(data_idx).fields.len() == 1 {
36             return def.variant(data_idx).fields[0].ty(tcx, substs);
37         }
38     }
39
40     ty
41 }
42
43 impl<'a, 'tcx> FnCtxt<'a, 'tcx> {
44     pub fn check_transmute(&self, from: Ty<'tcx>, to: Ty<'tcx>, hir_id: HirId) {
45         let tcx = self.tcx;
46         let span = tcx.hir().span(hir_id);
47         let normalize = |ty| {
48             let ty = self.resolve_vars_if_possible(ty);
49             self.tcx.normalize_erasing_regions(self.param_env, ty)
50         };
51         let from = normalize(from);
52         let to = normalize(to);
53         trace!(?from, ?to);
54
55         // Transmutes that are only changing lifetimes are always ok.
56         if from == to {
57             return;
58         }
59
60         let skel = |ty| SizeSkeleton::compute(ty, tcx, self.param_env);
61         let sk_from = skel(from);
62         let sk_to = skel(to);
63         trace!(?sk_from, ?sk_to);
64
65         // Check for same size using the skeletons.
66         if let (Ok(sk_from), Ok(sk_to)) = (sk_from, sk_to) {
67             if sk_from.same_size(sk_to) {
68                 return;
69             }
70
71             // Special-case transmuting from `typeof(function)` and
72             // `Option<typeof(function)>` to present a clearer error.
73             let from = unpack_option_like(tcx, from);
74             if let (&ty::FnDef(..), SizeSkeleton::Known(size_to)) = (from.kind(), sk_to) && size_to == Pointer.size(&tcx) {
75                 struct_span_err!(tcx.sess, span, E0591, "can't transmute zero-sized type")
76                     .note(&format!("source type: {from}"))
77                     .note(&format!("target type: {to}"))
78                     .help("cast with `as` to a pointer instead")
79                     .emit();
80                 return;
81             }
82         }
83
84         // Try to display a sensible error with as much information as possible.
85         let skeleton_string = |ty: Ty<'tcx>, sk| match sk {
86             Ok(SizeSkeleton::Known(size)) => format!("{} bits", size.bits()),
87             Ok(SizeSkeleton::Pointer { tail, .. }) => format!("pointer to `{tail}`"),
88             Err(LayoutError::Unknown(bad)) => {
89                 if bad == ty {
90                     "this type does not have a fixed size".to_owned()
91                 } else {
92                     format!("size can vary because of {bad}")
93                 }
94             }
95             Err(err) => err.to_string(),
96         };
97
98         let mut err = struct_span_err!(
99             tcx.sess,
100             span,
101             E0512,
102             "cannot transmute between types of different sizes, \
103                                         or dependently-sized types"
104         );
105         if from == to {
106             err.note(&format!("`{from}` does not have a fixed size"));
107         } else {
108             err.note(&format!("source type: `{}` ({})", from, skeleton_string(from, sk_from)))
109                 .note(&format!("target type: `{}` ({})", to, skeleton_string(to, sk_to)));
110         }
111         err.emit();
112     }
113 }
114
115 pub struct InlineAsmCtxt<'a, 'tcx> {
116     tcx: TyCtxt<'tcx>,
117     param_env: ty::ParamEnv<'tcx>,
118     get_operand_ty: Box<dyn Fn(&'tcx hir::Expr<'tcx>) -> Ty<'tcx> + 'a>,
119 }
120
121 impl<'a, 'tcx> InlineAsmCtxt<'a, 'tcx> {
122     pub fn new_global_asm(tcx: TyCtxt<'tcx>) -> Self {
123         InlineAsmCtxt {
124             tcx,
125             param_env: ty::ParamEnv::empty(),
126             get_operand_ty: Box::new(|e| bug!("asm operand in global asm: {e:?}")),
127         }
128     }
129
130     pub fn new_in_fn(
131         tcx: TyCtxt<'tcx>,
132         param_env: ty::ParamEnv<'tcx>,
133         get_operand_ty: impl Fn(&'tcx hir::Expr<'tcx>) -> Ty<'tcx> + 'a,
134     ) -> Self {
135         InlineAsmCtxt { tcx, param_env, get_operand_ty: Box::new(get_operand_ty) }
136     }
137
138     // FIXME(compiler-errors): This could use `<$ty as Pointee>::Metadata == ()`
139     fn is_thin_ptr_ty(&self, ty: Ty<'tcx>) -> bool {
140         // Type still may have region variables, but `Sized` does not depend
141         // on those, so just erase them before querying.
142         if ty.is_sized(self.tcx.at(DUMMY_SP), self.param_env) {
143             return true;
144         }
145         if let ty::Foreign(..) = ty.kind() {
146             return true;
147         }
148         false
149     }
150
151     fn check_asm_operand_type(
152         &self,
153         idx: usize,
154         reg: InlineAsmRegOrRegClass,
155         expr: &'tcx hir::Expr<'tcx>,
156         template: &[InlineAsmTemplatePiece],
157         is_input: bool,
158         tied_input: Option<(&'tcx hir::Expr<'tcx>, Option<InlineAsmType>)>,
159         target_features: &FxHashSet<Symbol>,
160     ) -> Option<InlineAsmType> {
161         let ty = (self.get_operand_ty)(expr);
162         if ty.has_non_region_infer() {
163             bug!("inference variable in asm operand ty: {:?} {:?}", expr, ty);
164         }
165         let asm_ty_isize = match self.tcx.sess.target.pointer_width {
166             16 => InlineAsmType::I16,
167             32 => InlineAsmType::I32,
168             64 => InlineAsmType::I64,
169             _ => unreachable!(),
170         };
171
172         let asm_ty = match *ty.kind() {
173             // `!` is allowed for input but not for output (issue #87802)
174             ty::Never if is_input => return None,
175             ty::Error(_) => return None,
176             ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => Some(InlineAsmType::I8),
177             ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => Some(InlineAsmType::I16),
178             ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => Some(InlineAsmType::I32),
179             ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => Some(InlineAsmType::I64),
180             ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => Some(InlineAsmType::I128),
181             ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => Some(asm_ty_isize),
182             ty::Float(FloatTy::F32) => Some(InlineAsmType::F32),
183             ty::Float(FloatTy::F64) => Some(InlineAsmType::F64),
184             ty::FnPtr(_) => Some(asm_ty_isize),
185             ty::RawPtr(ty::TypeAndMut { ty, mutbl: _ }) if self.is_thin_ptr_ty(ty) => {
186                 Some(asm_ty_isize)
187             }
188             ty::Adt(adt, substs) if adt.repr().simd() => {
189                 let fields = &adt.non_enum_variant().fields;
190                 let elem_ty = fields[0].ty(self.tcx, substs);
191                 match elem_ty.kind() {
192                     ty::Never | ty::Error(_) => return None,
193                     ty::Int(IntTy::I8) | ty::Uint(UintTy::U8) => {
194                         Some(InlineAsmType::VecI8(fields.len() as u64))
195                     }
196                     ty::Int(IntTy::I16) | ty::Uint(UintTy::U16) => {
197                         Some(InlineAsmType::VecI16(fields.len() as u64))
198                     }
199                     ty::Int(IntTy::I32) | ty::Uint(UintTy::U32) => {
200                         Some(InlineAsmType::VecI32(fields.len() as u64))
201                     }
202                     ty::Int(IntTy::I64) | ty::Uint(UintTy::U64) => {
203                         Some(InlineAsmType::VecI64(fields.len() as u64))
204                     }
205                     ty::Int(IntTy::I128) | ty::Uint(UintTy::U128) => {
206                         Some(InlineAsmType::VecI128(fields.len() as u64))
207                     }
208                     ty::Int(IntTy::Isize) | ty::Uint(UintTy::Usize) => {
209                         Some(match self.tcx.sess.target.pointer_width {
210                             16 => InlineAsmType::VecI16(fields.len() as u64),
211                             32 => InlineAsmType::VecI32(fields.len() as u64),
212                             64 => InlineAsmType::VecI64(fields.len() as u64),
213                             _ => unreachable!(),
214                         })
215                     }
216                     ty::Float(FloatTy::F32) => Some(InlineAsmType::VecF32(fields.len() as u64)),
217                     ty::Float(FloatTy::F64) => Some(InlineAsmType::VecF64(fields.len() as u64)),
218                     _ => None,
219                 }
220             }
221             ty::Infer(_) => unreachable!(),
222             _ => None,
223         };
224         let Some(asm_ty) = asm_ty else {
225             let msg = &format!("cannot use value of type `{ty}` for inline assembly");
226             let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
227             err.note(
228                 "only integers, floats, SIMD vectors, pointers and function pointers \
229                  can be used as arguments for inline assembly",
230             );
231             err.emit();
232             return None;
233         };
234
235         // Check that the type implements Copy. The only case where this can
236         // possibly fail is for SIMD types which don't #[derive(Copy)].
237         if !ty.is_copy_modulo_regions(self.tcx.at(expr.span), self.param_env) {
238             let msg = "arguments for inline assembly must be copyable";
239             let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
240             err.note(&format!("`{ty}` does not implement the Copy trait"));
241             err.emit();
242         }
243
244         // Ideally we wouldn't need to do this, but LLVM's register allocator
245         // really doesn't like it when tied operands have different types.
246         //
247         // This is purely an LLVM limitation, but we have to live with it since
248         // there is no way to hide this with implicit conversions.
249         //
250         // For the purposes of this check we only look at the `InlineAsmType`,
251         // which means that pointers and integers are treated as identical (modulo
252         // size).
253         if let Some((in_expr, Some(in_asm_ty))) = tied_input {
254             if in_asm_ty != asm_ty {
255                 let msg = "incompatible types for asm inout argument";
256                 let mut err = self.tcx.sess.struct_span_err(vec![in_expr.span, expr.span], msg);
257
258                 let in_expr_ty = (self.get_operand_ty)(in_expr);
259                 err.span_label(in_expr.span, &format!("type `{in_expr_ty}`"));
260                 err.span_label(expr.span, &format!("type `{ty}`"));
261                 err.note(
262                     "asm inout arguments must have the same type, \
263                     unless they are both pointers or integers of the same size",
264                 );
265                 err.emit();
266             }
267
268             // All of the later checks have already been done on the input, so
269             // let's not emit errors and warnings twice.
270             return Some(asm_ty);
271         }
272
273         // Check the type against the list of types supported by the selected
274         // register class.
275         let asm_arch = self.tcx.sess.asm_arch.unwrap();
276         let reg_class = reg.reg_class();
277         let supported_tys = reg_class.supported_types(asm_arch);
278         let Some((_, feature)) = supported_tys.iter().find(|&&(t, _)| t == asm_ty) else {
279             let msg = &format!("type `{ty}` cannot be used with this register class");
280             let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
281             let supported_tys: Vec<_> =
282                 supported_tys.iter().map(|(t, _)| t.to_string()).collect();
283             err.note(&format!(
284                 "register class `{}` supports these types: {}",
285                 reg_class.name(),
286                 supported_tys.join(", "),
287             ));
288             if let Some(suggest) = reg_class.suggest_class(asm_arch, asm_ty) {
289                 err.help(&format!(
290                     "consider using the `{}` register class instead",
291                     suggest.name()
292                 ));
293             }
294             err.emit();
295             return Some(asm_ty);
296         };
297
298         // Check whether the selected type requires a target feature. Note that
299         // this is different from the feature check we did earlier. While the
300         // previous check checked that this register class is usable at all
301         // with the currently enabled features, some types may only be usable
302         // with a register class when a certain feature is enabled. We check
303         // this here since it depends on the results of typeck.
304         //
305         // Also note that this check isn't run when the operand type is never
306         // (!). In that case we still need the earlier check to verify that the
307         // register class is usable at all.
308         if let Some(feature) = feature {
309             if !target_features.contains(&feature) {
310                 let msg = &format!("`{}` target feature is not enabled", feature);
311                 let mut err = self.tcx.sess.struct_span_err(expr.span, msg);
312                 err.note(&format!(
313                     "this is required to use type `{}` with register class `{}`",
314                     ty,
315                     reg_class.name(),
316                 ));
317                 err.emit();
318                 return Some(asm_ty);
319             }
320         }
321
322         // Check whether a modifier is suggested for using this type.
323         if let Some((suggested_modifier, suggested_result)) =
324             reg_class.suggest_modifier(asm_arch, asm_ty)
325         {
326             // Search for any use of this operand without a modifier and emit
327             // the suggestion for them.
328             let mut spans = vec![];
329             for piece in template {
330                 if let &InlineAsmTemplatePiece::Placeholder { operand_idx, modifier, span } = piece
331                 {
332                     if operand_idx == idx && modifier.is_none() {
333                         spans.push(span);
334                     }
335                 }
336             }
337             if !spans.is_empty() {
338                 let (default_modifier, default_result) =
339                     reg_class.default_modifier(asm_arch).unwrap();
340                 self.tcx.struct_span_lint_hir(
341                     lint::builtin::ASM_SUB_REGISTER,
342                     expr.hir_id,
343                     spans,
344                     "formatting may not be suitable for sub-register argument",
345                     |lint| {
346                         lint.span_label(expr.span, "for this argument");
347                         lint.help(&format!(
348                             "use `{{{idx}:{suggested_modifier}}}` to have the register formatted as `{suggested_result}`",
349                         ));
350                         lint.help(&format!(
351                             "or use `{{{idx}:{default_modifier}}}` to keep the default formatting of `{default_result}`",
352                         ));
353                         lint
354                     },
355                 );
356             }
357         }
358
359         Some(asm_ty)
360     }
361
362     pub fn check_asm(&self, asm: &hir::InlineAsm<'tcx>, enclosing_id: hir::HirId) {
363         let hir = self.tcx.hir();
364         let enclosing_def_id = hir.local_def_id(enclosing_id).to_def_id();
365         let target_features = self.tcx.asm_target_features(enclosing_def_id);
366         let Some(asm_arch) = self.tcx.sess.asm_arch else {
367             self.tcx.sess.delay_span_bug(DUMMY_SP, "target architecture does not support asm");
368             return;
369         };
370         for (idx, (op, op_sp)) in asm.operands.iter().enumerate() {
371             // Validate register classes against currently enabled target
372             // features. We check that at least one type is available for
373             // the enabled features.
374             //
375             // We ignore target feature requirements for clobbers: if the
376             // feature is disabled then the compiler doesn't care what we
377             // do with the registers.
378             //
379             // Note that this is only possible for explicit register
380             // operands, which cannot be used in the asm string.
381             if let Some(reg) = op.reg() {
382                 // Some explicit registers cannot be used depending on the
383                 // target. Reject those here.
384                 if let InlineAsmRegOrRegClass::Reg(reg) = reg {
385                     if let InlineAsmReg::Err = reg {
386                         // `validate` will panic on `Err`, as an error must
387                         // already have been reported.
388                         continue;
389                     }
390                     if let Err(msg) = reg.validate(
391                         asm_arch,
392                         self.tcx.sess.relocation_model(),
393                         &target_features,
394                         &self.tcx.sess.target,
395                         op.is_clobber(),
396                     ) {
397                         let msg = format!("cannot use register `{}`: {}", reg.name(), msg);
398                         self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
399                         continue;
400                     }
401                 }
402
403                 if !op.is_clobber() {
404                     let mut missing_required_features = vec![];
405                     let reg_class = reg.reg_class();
406                     if let InlineAsmRegClass::Err = reg_class {
407                         continue;
408                     }
409                     for &(_, feature) in reg_class.supported_types(asm_arch) {
410                         match feature {
411                             Some(feature) => {
412                                 if target_features.contains(&feature) {
413                                     missing_required_features.clear();
414                                     break;
415                                 } else {
416                                     missing_required_features.push(feature);
417                                 }
418                             }
419                             None => {
420                                 missing_required_features.clear();
421                                 break;
422                             }
423                         }
424                     }
425
426                     // We are sorting primitive strs here and can use unstable sort here
427                     missing_required_features.sort_unstable();
428                     missing_required_features.dedup();
429                     match &missing_required_features[..] {
430                         [] => {}
431                         [feature] => {
432                             let msg = format!(
433                                 "register class `{}` requires the `{}` target feature",
434                                 reg_class.name(),
435                                 feature
436                             );
437                             self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
438                             // register isn't enabled, don't do more checks
439                             continue;
440                         }
441                         features => {
442                             let msg = format!(
443                                 "register class `{}` requires at least one of the following target features: {}",
444                                 reg_class.name(),
445                                 features
446                                     .iter()
447                                     .map(|f| f.as_str())
448                                     .intersperse(", ")
449                                     .collect::<String>(),
450                             );
451                             self.tcx.sess.struct_span_err(*op_sp, &msg).emit();
452                             // register isn't enabled, don't do more checks
453                             continue;
454                         }
455                     }
456                 }
457             }
458
459             match *op {
460                 hir::InlineAsmOperand::In { reg, ref expr } => {
461                     self.check_asm_operand_type(
462                         idx,
463                         reg,
464                         expr,
465                         asm.template,
466                         true,
467                         None,
468                         &target_features,
469                     );
470                 }
471                 hir::InlineAsmOperand::Out { reg, late: _, ref expr } => {
472                     if let Some(expr) = expr {
473                         self.check_asm_operand_type(
474                             idx,
475                             reg,
476                             expr,
477                             asm.template,
478                             false,
479                             None,
480                             &target_features,
481                         );
482                     }
483                 }
484                 hir::InlineAsmOperand::InOut { reg, late: _, ref expr } => {
485                     self.check_asm_operand_type(
486                         idx,
487                         reg,
488                         expr,
489                         asm.template,
490                         false,
491                         None,
492                         &target_features,
493                     );
494                 }
495                 hir::InlineAsmOperand::SplitInOut { reg, late: _, ref in_expr, ref out_expr } => {
496                     let in_ty = self.check_asm_operand_type(
497                         idx,
498                         reg,
499                         in_expr,
500                         asm.template,
501                         true,
502                         None,
503                         &target_features,
504                     );
505                     if let Some(out_expr) = out_expr {
506                         self.check_asm_operand_type(
507                             idx,
508                             reg,
509                             out_expr,
510                             asm.template,
511                             false,
512                             Some((in_expr, in_ty)),
513                             &target_features,
514                         );
515                     }
516                 }
517                 // No special checking is needed for these:
518                 // - Typeck has checked that Const operands are integers.
519                 // - AST lowering guarantees that SymStatic points to a static.
520                 hir::InlineAsmOperand::Const { .. } | hir::InlineAsmOperand::SymStatic { .. } => {}
521                 // Check that sym actually points to a function. Later passes
522                 // depend on this.
523                 hir::InlineAsmOperand::SymFn { anon_const } => {
524                     let ty = self.tcx.typeck_body(anon_const.body).node_type(anon_const.hir_id);
525                     match ty.kind() {
526                         ty::Never | ty::Error(_) => {}
527                         ty::FnDef(..) => {}
528                         _ => {
529                             let mut err =
530                                 self.tcx.sess.struct_span_err(*op_sp, "invalid `sym` operand");
531                             err.span_label(
532                                 self.tcx.hir().span(anon_const.body.hir_id),
533                                 &format!("is {} `{}`", ty.kind().article(), ty),
534                             );
535                             err.help("`sym` operands must refer to either a function or a static");
536                             err.emit();
537                         }
538                     };
539                 }
540             }
541         }
542     }
543 }