1 //! Codegen `extern "platform-intrinsic"` intrinsics.
6 pub(super) fn codegen_simd_intrinsic_call<'tcx>(
7 fx: &mut FunctionCx<'_, 'tcx, impl Module>,
8 instance: Instance<'tcx>,
9 args: &[mir::Operand<'tcx>],
13 let def_id = instance.def_id();
14 let substs = instance.substs;
16 let intrinsic = fx.tcx.item_name(def_id).as_str();
17 let intrinsic = &intrinsic[..];
20 fx, intrinsic, substs, args,
22 fx.tcx.sess.span_fatal(span, &format!("Unknown SIMD intrinsic {}", intrinsic));
26 validate_simd_type!(fx, intrinsic, span, a.layout().ty);
27 simd_for_each_lane(fx, a, ret, |fx, lane_layout, ret_lane_layout, lane| {
28 let ret_lane_ty = fx.clif_type(ret_lane_layout.ty).unwrap();
30 let from_signed = type_sign(lane_layout.ty);
31 let to_signed = type_sign(ret_lane_layout.ty);
33 let ret_lane = clif_int_or_float_cast(fx, lane, from_signed, ret_lane_ty, to_signed);
34 CValue::by_val(ret_lane, ret_lane_layout)
39 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
40 simd_cmp!(fx, Equal|Equal(x, y) -> ret);
43 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
44 simd_cmp!(fx, NotEqual|NotEqual(x, y) -> ret);
47 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
48 simd_cmp!(fx, UnsignedLessThan|SignedLessThan|LessThan(x, y) -> ret);
51 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
52 simd_cmp!(fx, UnsignedLessThanOrEqual|SignedLessThanOrEqual|LessThanOrEqual(x, y) -> ret);
55 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
56 simd_cmp!(fx, UnsignedGreaterThan|SignedGreaterThan|GreaterThan(x, y) -> ret);
59 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
62 UnsignedGreaterThanOrEqual|SignedGreaterThanOrEqual|GreaterThanOrEqual
67 // simd_shuffle32<T, U>(x: T, y: T, idx: [u32; 32]) -> U
68 _ if intrinsic.starts_with("simd_shuffle"), (c x, c y, o idx) {
69 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
71 let n: u16 = intrinsic["simd_shuffle".len()..].parse().unwrap();
73 assert_eq!(x.layout(), y.layout());
74 let layout = x.layout();
76 let (lane_type, lane_count) = lane_type_and_count(fx.tcx, layout);
77 let (ret_lane_type, ret_lane_count) = lane_type_and_count(fx.tcx, ret.layout());
79 assert_eq!(lane_type, ret_lane_type);
80 assert_eq!(n, ret_lane_count);
82 let total_len = lane_count * 2;
85 use rustc_middle::mir::interpret::*;
86 let idx_const = crate::constant::mir_operand_get_const_val(fx, idx).expect("simd_shuffle* idx not const");
88 let idx_bytes = match idx_const.val {
89 ty::ConstKind::Value(ConstValue::ByRef { alloc, offset }) => {
90 let ptr = Pointer::new(AllocId(0 /* dummy */), offset);
91 let size = Size::from_bytes(4 * u64::from(ret_lane_count) /* size_of([u32; ret_lane_count]) */);
92 alloc.get_bytes(fx, ptr, size).unwrap()
94 _ => unreachable!("{:?}", idx_const),
97 (0..ret_lane_count).map(|i| {
98 let i = usize::try_from(i).unwrap();
99 let idx = rustc_middle::mir::interpret::read_target_uint(
100 fx.tcx.data_layout.endian,
101 &idx_bytes[4*i.. 4*i + 4],
102 ).expect("read_target_uint");
103 u16::try_from(idx).expect("try_from u32")
104 }).collect::<Vec<u16>>()
107 for &idx in &indexes {
108 assert!(idx < total_len, "idx {} out of range 0..{}", idx, total_len);
111 for (out_idx, in_idx) in indexes.into_iter().enumerate() {
112 let in_lane = if in_idx < lane_count {
113 x.value_field(fx, mir::Field::new(in_idx.into()))
115 y.value_field(fx, mir::Field::new((in_idx - lane_count).into()))
117 let out_lane = ret.place_field(fx, mir::Field::new(out_idx));
118 out_lane.write_cvalue(fx, in_lane);
122 simd_insert, (c base, o idx, c val) {
124 let idx_const = if let Some(idx_const) = crate::constant::mir_operand_get_const_val(fx, idx) {
127 fx.tcx.sess.span_fatal(
129 "Index argument for `simd_insert` is not a constant",
133 let idx = idx_const.val.try_to_bits(Size::from_bytes(4 /* u32*/)).unwrap_or_else(|| panic!("kind not scalar: {:?}", idx_const));
134 let (_lane_type, lane_count) = lane_type_and_count(fx.tcx, base.layout());
135 if idx >= lane_count.into() {
136 fx.tcx.sess.span_fatal(fx.mir.span, &format!("[simd_insert] idx {} >= lane_count {}", idx, lane_count));
139 ret.write_cvalue(fx, base);
140 let ret_lane = ret.place_field(fx, mir::Field::new(idx.try_into().unwrap()));
141 ret_lane.write_cvalue(fx, val);
144 simd_extract, (c v, o idx) {
145 validate_simd_type!(fx, intrinsic, span, v.layout().ty);
146 let idx_const = if let Some(idx_const) = crate::constant::mir_operand_get_const_val(fx, idx) {
149 fx.tcx.sess.span_warn(
151 "Index argument for `simd_extract` is not a constant",
153 let res = crate::trap::trap_unimplemented_ret_value(
156 "Index argument for `simd_extract` is not a constant",
158 ret.write_cvalue(fx, res);
162 let idx = idx_const.val.try_to_bits(Size::from_bytes(4 /* u32*/)).unwrap_or_else(|| panic!("kind not scalar: {:?}", idx_const));
163 let (_lane_type, lane_count) = lane_type_and_count(fx.tcx, v.layout());
164 if idx >= lane_count.into() {
165 fx.tcx.sess.span_fatal(fx.mir.span, &format!("[simd_extract] idx {} >= lane_count {}", idx, lane_count));
168 let ret_lane = v.value_field(fx, mir::Field::new(idx.try_into().unwrap()));
169 ret.write_cvalue(fx, ret_lane);
172 simd_add, (c x, c y) {
173 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
174 simd_int_flt_binop!(fx, iadd|fadd(x, y) -> ret);
176 simd_sub, (c x, c y) {
177 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
178 simd_int_flt_binop!(fx, isub|fsub(x, y) -> ret);
180 simd_mul, (c x, c y) {
181 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
182 simd_int_flt_binop!(fx, imul|fmul(x, y) -> ret);
184 simd_div, (c x, c y) {
185 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
186 simd_int_flt_binop!(fx, udiv|sdiv|fdiv(x, y) -> ret);
188 simd_shl, (c x, c y) {
189 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
190 simd_int_binop!(fx, ishl(x, y) -> ret);
192 simd_shr, (c x, c y) {
193 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
194 simd_int_binop!(fx, ushr|sshr(x, y) -> ret);
196 simd_and, (c x, c y) {
197 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
198 simd_int_binop!(fx, band(x, y) -> ret);
200 simd_or, (c x, c y) {
201 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
202 simd_int_binop!(fx, bor(x, y) -> ret);
204 simd_xor, (c x, c y) {
205 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
206 simd_int_binop!(fx, bxor(x, y) -> ret);
209 simd_fma, (c a, c b, c c) {
210 validate_simd_type!(fx, intrinsic, span, a.layout().ty);
211 assert_eq!(a.layout(), b.layout());
212 assert_eq!(a.layout(), c.layout());
213 let layout = a.layout();
215 let (_lane_layout, lane_count) = lane_type_and_count(fx.tcx, layout);
216 let (ret_lane_layout, ret_lane_count) = lane_type_and_count(fx.tcx, ret.layout());
217 assert_eq!(lane_count, ret_lane_count);
219 for lane in 0..lane_count {
220 let lane = mir::Field::new(lane.into());
221 let a_lane = a.value_field(fx, lane).load_scalar(fx);
222 let b_lane = b.value_field(fx, lane).load_scalar(fx);
223 let c_lane = c.value_field(fx, lane).load_scalar(fx);
225 let mul_lane = fx.bcx.ins().fmul(a_lane, b_lane);
226 let res_lane = CValue::by_val(fx.bcx.ins().fadd(mul_lane, c_lane), ret_lane_layout);
228 ret.place_field(fx, lane).write_cvalue(fx, res_lane);
232 simd_fmin, (c x, c y) {
233 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
234 simd_flt_binop!(fx, fmin(x, y) -> ret);
236 simd_fmax, (c x, c y) {
237 validate_simd_type!(fx, intrinsic, span, x.layout().ty);
238 simd_flt_binop!(fx, fmax(x, y) -> ret);
241 simd_reduce_add_ordered | simd_reduce_add_unordered, (c v) {
242 validate_simd_type!(fx, intrinsic, span, v.layout().ty);
243 simd_reduce(fx, v, ret, |fx, lane_layout, a, b| {
244 if lane_layout.ty.is_floating_point() {
245 fx.bcx.ins().fadd(a, b)
247 fx.bcx.ins().iadd(a, b)
252 simd_reduce_mul_ordered | simd_reduce_mul_unordered, (c v) {
253 validate_simd_type!(fx, intrinsic, span, v.layout().ty);
254 simd_reduce(fx, v, ret, |fx, lane_layout, a, b| {
255 if lane_layout.ty.is_floating_point() {
256 fx.bcx.ins().fmul(a, b)
258 fx.bcx.ins().imul(a, b)
263 simd_reduce_all, (c v) {
264 validate_simd_type!(fx, intrinsic, span, v.layout().ty);
265 simd_reduce_bool(fx, v, ret, |fx, a, b| fx.bcx.ins().band(a, b));
268 simd_reduce_any, (c v) {
269 validate_simd_type!(fx, intrinsic, span, v.layout().ty);
270 simd_reduce_bool(fx, v, ret, |fx, a, b| fx.bcx.ins().bor(a, b));
274 // simd_saturating_add