1 use crate::{ImplTraitContext, ImplTraitPosition, ParamMode, ResolverAstLoweringExt};
3 use super::LoweringContext;
7 use rustc_data_structures::fx::FxHashMap;
8 use rustc_data_structures::stable_set::FxHashSet;
9 use rustc_errors::struct_span_err;
11 use rustc_hir::def::{DefKind, Res};
12 use rustc_hir::definitions::DefPathData;
13 use rustc_session::parse::feature_err;
14 use rustc_span::{sym, Span};
15 use rustc_target::asm;
16 use std::collections::hash_map::Entry;
19 impl<'a, 'hir> LoweringContext<'a, 'hir> {
20 pub(crate) fn lower_inline_asm(
24 ) -> &'hir hir::InlineAsm<'hir> {
25 // Rustdoc needs to support asm! from foreign architectures: don't try
26 // lowering the register constraints in this case.
27 let asm_arch = if self.sess.opts.actually_rustdoc { None } else { self.sess.asm_arch };
28 if asm_arch.is_none() && !self.sess.opts.actually_rustdoc {
29 struct_span_err!(self.sess, sp, E0472, "inline assembly is unsupported on this target")
32 if let Some(asm_arch) = asm_arch {
33 // Inline assembly is currently only stable for these architectures.
34 let is_stable = matches!(
36 asm::InlineAsmArch::X86
37 | asm::InlineAsmArch::X86_64
38 | asm::InlineAsmArch::Arm
39 | asm::InlineAsmArch::AArch64
40 | asm::InlineAsmArch::RiscV32
41 | asm::InlineAsmArch::RiscV64
43 if !is_stable && !self.sess.features_untracked().asm_experimental_arch {
45 &self.sess.parse_sess,
46 sym::asm_experimental_arch,
48 "inline assembly is not stable yet on this architecture",
53 if asm.options.contains(InlineAsmOptions::ATT_SYNTAX)
54 && !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
55 && !self.sess.opts.actually_rustdoc
58 .struct_span_err(sp, "the `att_syntax` option is only supported on x86")
61 if asm.options.contains(InlineAsmOptions::MAY_UNWIND)
62 && !self.sess.features_untracked().asm_unwind
65 &self.sess.parse_sess,
68 "the `may_unwind` option is unstable",
73 let mut clobber_abis = FxHashMap::default();
74 if let Some(asm_arch) = asm_arch {
75 for (abi_name, abi_span) in &asm.clobber_abis {
76 match asm::InlineAsmClobberAbi::parse(asm_arch, &self.sess.target, *abi_name) {
78 // If the abi was already in the list, emit an error
79 match clobber_abis.get(&abi) {
80 Some((prev_name, prev_sp)) => {
81 let mut err = self.sess.struct_span_err(
83 &format!("`{}` ABI specified multiple times", prev_name),
85 err.span_label(*prev_sp, "previously specified here");
87 // Multiple different abi names may actually be the same ABI
88 // If the specified ABIs are not the same name, alert the user that they resolve to the same ABI
89 let source_map = self.sess.source_map();
90 if source_map.span_to_snippet(*prev_sp)
91 != source_map.span_to_snippet(*abi_span)
93 err.note("these ABIs are equivalent on the current target");
99 clobber_abis.insert(abi, (abi_name, *abi_span));
107 "`clobber_abi` is not supported on this target",
111 Err(supported_abis) => {
113 self.sess.struct_span_err(*abi_span, "invalid ABI for `clobber_abi`");
114 let mut abis = format!("`{}`", supported_abis[0]);
115 for m in &supported_abis[1..] {
116 let _ = write!(abis, ", `{}`", m);
119 "the following ABIs are supported on this target: {}",
128 // Lower operands to HIR. We use dummy register classes if an error
129 // occurs during lowering because we still need to be able to produce a
131 let sess = self.sess;
132 let mut operands: Vec<_> = asm
136 let lower_reg = |reg| match reg {
137 InlineAsmRegOrRegClass::Reg(s) => {
138 asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
139 asm::InlineAsmReg::parse(asm_arch, s).unwrap_or_else(|e| {
140 let msg = format!("invalid register `{}`: {}", s.as_str(), e);
141 sess.struct_span_err(*op_sp, &msg).emit();
142 asm::InlineAsmReg::Err
145 asm::InlineAsmReg::Err
148 InlineAsmRegOrRegClass::RegClass(s) => {
149 asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
150 asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
151 let msg = format!("invalid register class `{}`: {}", s.as_str(), e);
152 sess.struct_span_err(*op_sp, &msg).emit();
153 asm::InlineAsmRegClass::Err
156 asm::InlineAsmRegClass::Err
162 InlineAsmOperand::In { reg, ref expr } => hir::InlineAsmOperand::In {
164 expr: self.lower_expr_mut(expr),
166 InlineAsmOperand::Out { reg, late, ref expr } => hir::InlineAsmOperand::Out {
169 expr: expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
171 InlineAsmOperand::InOut { reg, late, ref expr } => {
172 hir::InlineAsmOperand::InOut {
175 expr: self.lower_expr_mut(expr),
178 InlineAsmOperand::SplitInOut { reg, late, ref in_expr, ref out_expr } => {
179 hir::InlineAsmOperand::SplitInOut {
182 in_expr: self.lower_expr_mut(in_expr),
183 out_expr: out_expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
186 InlineAsmOperand::Const { ref anon_const } => {
187 if !self.sess.features_untracked().asm_const {
189 &self.sess.parse_sess,
192 "const operands for inline assembly are unstable",
196 hir::InlineAsmOperand::Const {
197 anon_const: self.lower_anon_const(anon_const),
200 InlineAsmOperand::Sym { ref sym } => {
201 if !self.sess.features_untracked().asm_sym {
203 &self.sess.parse_sess,
206 "sym operands for inline assembly are unstable",
211 let static_def_id = self
213 .get_partial_res(sym.id)
214 .filter(|res| res.unresolved_segments() == 0)
216 if let Res::Def(DefKind::Static(_), def_id) = res.base_res() {
223 if let Some(def_id) = static_def_id {
224 let path = self.lower_qpath(
229 ImplTraitContext::Disallowed(ImplTraitPosition::Path),
231 hir::InlineAsmOperand::SymStatic { path, def_id }
233 // Replace the InlineAsmSym AST node with an
234 // Expr using the name node id.
237 kind: ExprKind::Path(sym.qself.clone(), sym.path.clone()),
239 attrs: AttrVec::new(),
243 // Wrap the expression in an AnonConst.
244 let parent_def_id = self.current_hir_id_owner;
245 let node_id = self.next_node_id();
246 self.create_def(parent_def_id, node_id, DefPathData::AnonConst);
247 let anon_const = AnonConst { id: node_id, value: P(expr) };
248 hir::InlineAsmOperand::SymFn {
249 anon_const: self.lower_anon_const(&anon_const),
254 (op, self.lower_span(*op_sp))
258 // Validate template modifiers against the register classes for the operands
259 for p in &asm.template {
260 if let InlineAsmTemplatePiece::Placeholder {
262 modifier: Some(modifier),
263 span: placeholder_span,
266 let op_sp = asm.operands[operand_idx].1;
267 match &operands[operand_idx].0 {
268 hir::InlineAsmOperand::In { reg, .. }
269 | hir::InlineAsmOperand::Out { reg, .. }
270 | hir::InlineAsmOperand::InOut { reg, .. }
271 | hir::InlineAsmOperand::SplitInOut { reg, .. } => {
272 let class = reg.reg_class();
273 if class == asm::InlineAsmRegClass::Err {
276 let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
277 if !valid_modifiers.contains(&modifier) {
278 let mut err = sess.struct_span_err(
280 "invalid asm template modifier for this register class",
282 err.span_label(placeholder_span, "template modifier");
283 err.span_label(op_sp, "argument");
284 if !valid_modifiers.is_empty() {
285 let mut mods = format!("`{}`", valid_modifiers[0]);
286 for m in &valid_modifiers[1..] {
287 let _ = write!(mods, ", `{}`", m);
290 "the `{}` register class supports \
291 the following template modifiers: {}",
297 "the `{}` register class does not support template modifiers",
304 hir::InlineAsmOperand::Const { .. } => {
305 let mut err = sess.struct_span_err(
307 "asm template modifiers are not allowed for `const` arguments",
309 err.span_label(placeholder_span, "template modifier");
310 err.span_label(op_sp, "argument");
313 hir::InlineAsmOperand::SymFn { .. }
314 | hir::InlineAsmOperand::SymStatic { .. } => {
315 let mut err = sess.struct_span_err(
317 "asm template modifiers are not allowed for `sym` arguments",
319 err.span_label(placeholder_span, "template modifier");
320 err.span_label(op_sp, "argument");
327 let mut used_input_regs = FxHashMap::default();
328 let mut used_output_regs = FxHashMap::default();
330 for (idx, &(ref op, op_sp)) in operands.iter().enumerate() {
331 if let Some(reg) = op.reg() {
332 let reg_class = reg.reg_class();
333 if reg_class == asm::InlineAsmRegClass::Err {
337 // Some register classes can only be used as clobbers. This
338 // means that we disallow passing a value in/out of the asm and
339 // require that the operand name an explicit register, not a
341 if reg_class.is_clobber_only(asm_arch.unwrap()) && !op.is_clobber() {
343 "register class `{}` can only be used as a clobber, \
344 not as an input or output",
347 sess.struct_span_err(op_sp, &msg).emit();
351 // Check for conflicts between explicit register operands.
352 if let asm::InlineAsmRegOrRegClass::Reg(reg) = reg {
353 let (input, output) = match op {
354 hir::InlineAsmOperand::In { .. } => (true, false),
356 // Late output do not conflict with inputs, but normal outputs do
357 hir::InlineAsmOperand::Out { late, .. } => (!late, true),
359 hir::InlineAsmOperand::InOut { .. }
360 | hir::InlineAsmOperand::SplitInOut { .. } => (true, true),
362 hir::InlineAsmOperand::Const { .. }
363 | hir::InlineAsmOperand::SymFn { .. }
364 | hir::InlineAsmOperand::SymStatic { .. } => {
369 // Flag to output the error only once per operand
370 let mut skip = false;
371 reg.overlapping_regs(|r| {
372 let mut check = |used_regs: &mut FxHashMap<asm::InlineAsmReg, usize>,
374 match used_regs.entry(r) {
375 Entry::Occupied(o) => {
382 let &(ref op2, op_sp2) = &operands[idx2];
383 let Some(asm::InlineAsmRegOrRegClass::Reg(reg2)) = op2.reg() else {
388 "register `{}` conflicts with register `{}`",
392 let mut err = sess.struct_span_err(op_sp, &msg);
393 err.span_label(op_sp, &format!("register `{}`", reg.name()));
394 err.span_label(op_sp2, &format!("register `{}`", reg2.name()));
398 hir::InlineAsmOperand::In { .. },
399 hir::InlineAsmOperand::Out { late, .. },
402 hir::InlineAsmOperand::Out { late, .. },
403 hir::InlineAsmOperand::In { .. },
406 let out_op_sp = if input { op_sp2 } else { op_sp };
407 let msg = "use `lateout` instead of \
408 `out` to avoid conflict";
409 err.span_help(out_op_sp, msg);
416 Entry::Vacant(v) => {
424 check(&mut used_input_regs, true);
427 check(&mut used_output_regs, false);
434 // If a clobber_abi is specified, add the necessary clobbers to the
436 let mut clobbered = FxHashSet::default();
437 for (abi, (_, abi_span)) in clobber_abis {
438 for &clobber in abi.clobbered_regs() {
439 // Don't emit a clobber for a register already clobbered
440 if clobbered.contains(&clobber) {
444 let mut output_used = false;
445 clobber.overlapping_regs(|reg| {
446 if used_output_regs.contains_key(®) {
453 hir::InlineAsmOperand::Out {
454 reg: asm::InlineAsmRegOrRegClass::Reg(clobber),
458 self.lower_span(abi_span),
460 clobbered.insert(clobber);
465 let operands = self.arena.alloc_from_iter(operands);
466 let template = self.arena.alloc_from_iter(asm.template.iter().cloned());
467 let template_strs = self.arena.alloc_from_iter(
470 .map(|(sym, snippet, span)| (*sym, *snippet, self.lower_span(*span))),
473 self.arena.alloc_from_iter(asm.line_spans.iter().map(|span| self.lower_span(*span)));
475 hir::InlineAsm { template, template_strs, operands, options: asm.options, line_spans };
476 self.arena.alloc(hir_asm)