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1 use super::LoweringContext;
2
3 use rustc_ast::*;
4 use rustc_data_structures::fx::FxHashMap;
5 use rustc_errors::struct_span_err;
6 use rustc_hir as hir;
7 use rustc_session::parse::feature_err;
8 use rustc_span::{sym, Span, Symbol};
9 use rustc_target::asm;
10 use std::collections::hash_map::Entry;
11 use std::fmt::Write;
12
13 impl<'a, 'hir> LoweringContext<'a, 'hir> {
14     crate fn lower_inline_asm(&mut self, sp: Span, asm: &InlineAsm) -> &'hir hir::InlineAsm<'hir> {
15         // Rustdoc needs to support asm! from foreign architectures: don't try
16         // lowering the register constraints in this case.
17         let asm_arch = if self.sess.opts.actually_rustdoc { None } else { self.sess.asm_arch };
18         if asm_arch.is_none() && !self.sess.opts.actually_rustdoc {
19             struct_span_err!(self.sess, sp, E0472, "inline assembly is unsupported on this target")
20                 .emit();
21         }
22         if let Some(asm_arch) = asm_arch {
23             // Inline assembly is currently only stable for these architectures.
24             let is_stable = matches!(
25                 asm_arch,
26                 asm::InlineAsmArch::X86
27                     | asm::InlineAsmArch::X86_64
28                     | asm::InlineAsmArch::Arm
29                     | asm::InlineAsmArch::AArch64
30                     | asm::InlineAsmArch::RiscV32
31                     | asm::InlineAsmArch::RiscV64
32             );
33             if !is_stable && !self.sess.features_untracked().asm_experimental_arch {
34                 feature_err(
35                     &self.sess.parse_sess,
36                     sym::asm_experimental_arch,
37                     sp,
38                     "inline assembly is not stable yet on this architecture",
39                 )
40                 .emit();
41             }
42         }
43         if asm.options.contains(InlineAsmOptions::ATT_SYNTAX)
44             && !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
45             && !self.sess.opts.actually_rustdoc
46         {
47             self.sess
48                 .struct_span_err(sp, "the `att_syntax` option is only supported on x86")
49                 .emit();
50         }
51
52         let mut clobber_abi = None;
53         if let Some(asm_arch) = asm_arch {
54             if let Some((abi_name, abi_span)) = asm.clobber_abi {
55                 match asm::InlineAsmClobberAbi::parse(asm_arch, &self.sess.target, abi_name) {
56                     Ok(abi) => clobber_abi = Some((abi, abi_span)),
57                     Err(&[]) => {
58                         self.sess
59                             .struct_span_err(
60                                 abi_span,
61                                 "`clobber_abi` is not supported on this target",
62                             )
63                             .emit();
64                     }
65                     Err(supported_abis) => {
66                         let mut err =
67                             self.sess.struct_span_err(abi_span, "invalid ABI for `clobber_abi`");
68                         let mut abis = format!("`{}`", supported_abis[0]);
69                         for m in &supported_abis[1..] {
70                             let _ = write!(abis, ", `{}`", m);
71                         }
72                         err.note(&format!(
73                             "the following ABIs are supported on this target: {}",
74                             abis
75                         ));
76                         err.emit();
77                     }
78                 }
79             }
80         }
81
82         // Lower operands to HIR. We use dummy register classes if an error
83         // occurs during lowering because we still need to be able to produce a
84         // valid HIR.
85         let sess = self.sess;
86         let mut operands: Vec<_> = asm
87             .operands
88             .iter()
89             .map(|(op, op_sp)| {
90                 let lower_reg = |reg| match reg {
91                     InlineAsmRegOrRegClass::Reg(s) => {
92                         asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
93                             asm::InlineAsmReg::parse(
94                                 asm_arch,
95                                 |feature| sess.target_features.contains(&Symbol::intern(feature)),
96                                 &sess.target,
97                                 s,
98                             )
99                             .unwrap_or_else(|e| {
100                                 let msg = format!("invalid register `{}`: {}", s.as_str(), e);
101                                 sess.struct_span_err(*op_sp, &msg).emit();
102                                 asm::InlineAsmReg::Err
103                             })
104                         } else {
105                             asm::InlineAsmReg::Err
106                         })
107                     }
108                     InlineAsmRegOrRegClass::RegClass(s) => {
109                         asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
110                             asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
111                                 let msg = format!("invalid register class `{}`: {}", s.as_str(), e);
112                                 sess.struct_span_err(*op_sp, &msg).emit();
113                                 asm::InlineAsmRegClass::Err
114                             })
115                         } else {
116                             asm::InlineAsmRegClass::Err
117                         })
118                     }
119                 };
120
121                 let op = match *op {
122                     InlineAsmOperand::In { reg, ref expr } => hir::InlineAsmOperand::In {
123                         reg: lower_reg(reg),
124                         expr: self.lower_expr_mut(expr),
125                     },
126                     InlineAsmOperand::Out { reg, late, ref expr } => hir::InlineAsmOperand::Out {
127                         reg: lower_reg(reg),
128                         late,
129                         expr: expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
130                     },
131                     InlineAsmOperand::InOut { reg, late, ref expr } => {
132                         hir::InlineAsmOperand::InOut {
133                             reg: lower_reg(reg),
134                             late,
135                             expr: self.lower_expr_mut(expr),
136                         }
137                     }
138                     InlineAsmOperand::SplitInOut { reg, late, ref in_expr, ref out_expr } => {
139                         hir::InlineAsmOperand::SplitInOut {
140                             reg: lower_reg(reg),
141                             late,
142                             in_expr: self.lower_expr_mut(in_expr),
143                             out_expr: out_expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
144                         }
145                     }
146                     InlineAsmOperand::Const { ref anon_const } => {
147                         if !self.sess.features_untracked().asm_const {
148                             feature_err(
149                                 &self.sess.parse_sess,
150                                 sym::asm_const,
151                                 *op_sp,
152                                 "const operands for inline assembly are unstable",
153                             )
154                             .emit();
155                         }
156                         hir::InlineAsmOperand::Const {
157                             anon_const: self.lower_anon_const(anon_const),
158                         }
159                     }
160                     InlineAsmOperand::Sym { ref expr } => {
161                         if !self.sess.features_untracked().asm_sym {
162                             feature_err(
163                                 &self.sess.parse_sess,
164                                 sym::asm_sym,
165                                 *op_sp,
166                                 "sym operands for inline assembly are unstable",
167                             )
168                             .emit();
169                         }
170                         hir::InlineAsmOperand::Sym { expr: self.lower_expr_mut(expr) }
171                     }
172                 };
173                 (op, self.lower_span(*op_sp))
174             })
175             .collect();
176
177         // Validate template modifiers against the register classes for the operands
178         for p in &asm.template {
179             if let InlineAsmTemplatePiece::Placeholder {
180                 operand_idx,
181                 modifier: Some(modifier),
182                 span: placeholder_span,
183             } = *p
184             {
185                 let op_sp = asm.operands[operand_idx].1;
186                 match &operands[operand_idx].0 {
187                     hir::InlineAsmOperand::In { reg, .. }
188                     | hir::InlineAsmOperand::Out { reg, .. }
189                     | hir::InlineAsmOperand::InOut { reg, .. }
190                     | hir::InlineAsmOperand::SplitInOut { reg, .. } => {
191                         let class = reg.reg_class();
192                         if class == asm::InlineAsmRegClass::Err {
193                             continue;
194                         }
195                         let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
196                         if !valid_modifiers.contains(&modifier) {
197                             let mut err = sess.struct_span_err(
198                                 placeholder_span,
199                                 "invalid asm template modifier for this register class",
200                             );
201                             err.span_label(placeholder_span, "template modifier");
202                             err.span_label(op_sp, "argument");
203                             if !valid_modifiers.is_empty() {
204                                 let mut mods = format!("`{}`", valid_modifiers[0]);
205                                 for m in &valid_modifiers[1..] {
206                                     let _ = write!(mods, ", `{}`", m);
207                                 }
208                                 err.note(&format!(
209                                     "the `{}` register class supports \
210                                      the following template modifiers: {}",
211                                     class.name(),
212                                     mods
213                                 ));
214                             } else {
215                                 err.note(&format!(
216                                     "the `{}` register class does not support template modifiers",
217                                     class.name()
218                                 ));
219                             }
220                             err.emit();
221                         }
222                     }
223                     hir::InlineAsmOperand::Const { .. } => {
224                         let mut err = sess.struct_span_err(
225                             placeholder_span,
226                             "asm template modifiers are not allowed for `const` arguments",
227                         );
228                         err.span_label(placeholder_span, "template modifier");
229                         err.span_label(op_sp, "argument");
230                         err.emit();
231                     }
232                     hir::InlineAsmOperand::Sym { .. } => {
233                         let mut err = sess.struct_span_err(
234                             placeholder_span,
235                             "asm template modifiers are not allowed for `sym` arguments",
236                         );
237                         err.span_label(placeholder_span, "template modifier");
238                         err.span_label(op_sp, "argument");
239                         err.emit();
240                     }
241                 }
242             }
243         }
244
245         let mut used_input_regs = FxHashMap::default();
246         let mut used_output_regs = FxHashMap::default();
247
248         for (idx, &(ref op, op_sp)) in operands.iter().enumerate() {
249             if let Some(reg) = op.reg() {
250                 let reg_class = reg.reg_class();
251                 if reg_class == asm::InlineAsmRegClass::Err {
252                     continue;
253                 }
254
255                 // Some register classes can only be used as clobbers. This
256                 // means that we disallow passing a value in/out of the asm and
257                 // require that the operand name an explicit register, not a
258                 // register class.
259                 if reg_class.is_clobber_only(asm_arch.unwrap()) && !op.is_clobber() {
260                     let msg = format!(
261                         "register class `{}` can only be used as a clobber, \
262                              not as an input or output",
263                         reg_class.name()
264                     );
265                     sess.struct_span_err(op_sp, &msg).emit();
266                     continue;
267                 }
268
269                 // Check for conflicts between explicit register operands.
270                 if let asm::InlineAsmRegOrRegClass::Reg(reg) = reg {
271                     let (input, output) = match op {
272                         hir::InlineAsmOperand::In { .. } => (true, false),
273
274                         // Late output do not conflict with inputs, but normal outputs do
275                         hir::InlineAsmOperand::Out { late, .. } => (!late, true),
276
277                         hir::InlineAsmOperand::InOut { .. }
278                         | hir::InlineAsmOperand::SplitInOut { .. } => (true, true),
279
280                         hir::InlineAsmOperand::Const { .. } | hir::InlineAsmOperand::Sym { .. } => {
281                             unreachable!()
282                         }
283                     };
284
285                     // Flag to output the error only once per operand
286                     let mut skip = false;
287                     reg.overlapping_regs(|r| {
288                         let mut check = |used_regs: &mut FxHashMap<asm::InlineAsmReg, usize>,
289                                          input| {
290                             match used_regs.entry(r) {
291                                 Entry::Occupied(o) => {
292                                     if skip {
293                                         return;
294                                     }
295                                     skip = true;
296
297                                     let idx2 = *o.get();
298                                     let &(ref op2, op_sp2) = &operands[idx2];
299                                     let reg2 = match op2.reg() {
300                                         Some(asm::InlineAsmRegOrRegClass::Reg(r)) => r,
301                                         _ => unreachable!(),
302                                     };
303
304                                     let msg = format!(
305                                         "register `{}` conflicts with register `{}`",
306                                         reg.name(),
307                                         reg2.name()
308                                     );
309                                     let mut err = sess.struct_span_err(op_sp, &msg);
310                                     err.span_label(op_sp, &format!("register `{}`", reg.name()));
311                                     err.span_label(op_sp2, &format!("register `{}`", reg2.name()));
312
313                                     match (op, op2) {
314                                         (
315                                             hir::InlineAsmOperand::In { .. },
316                                             hir::InlineAsmOperand::Out { late, .. },
317                                         )
318                                         | (
319                                             hir::InlineAsmOperand::Out { late, .. },
320                                             hir::InlineAsmOperand::In { .. },
321                                         ) => {
322                                             assert!(!*late);
323                                             let out_op_sp = if input { op_sp2 } else { op_sp };
324                                             let msg = "use `lateout` instead of \
325                                                        `out` to avoid conflict";
326                                             err.span_help(out_op_sp, msg);
327                                         }
328                                         _ => {}
329                                     }
330
331                                     err.emit();
332                                 }
333                                 Entry::Vacant(v) => {
334                                     v.insert(idx);
335                                 }
336                             }
337                         };
338                         if input {
339                             check(&mut used_input_regs, true);
340                         }
341                         if output {
342                             check(&mut used_output_regs, false);
343                         }
344                     });
345                 }
346             }
347         }
348
349         // If a clobber_abi is specified, add the necessary clobbers to the
350         // operands list.
351         if let Some((abi, abi_span)) = clobber_abi {
352             for &clobber in abi.clobbered_regs() {
353                 let mut output_used = false;
354                 clobber.overlapping_regs(|reg| {
355                     if used_output_regs.contains_key(&reg) {
356                         output_used = true;
357                     }
358                 });
359
360                 if !output_used {
361                     operands.push((
362                         hir::InlineAsmOperand::Out {
363                             reg: asm::InlineAsmRegOrRegClass::Reg(clobber),
364                             late: true,
365                             expr: None,
366                         },
367                         self.lower_span(abi_span),
368                     ));
369                 }
370             }
371         }
372
373         let operands = self.arena.alloc_from_iter(operands);
374         let template = self.arena.alloc_from_iter(asm.template.iter().cloned());
375         let template_strs = self.arena.alloc_from_iter(
376             asm.template_strs
377                 .iter()
378                 .map(|(sym, snippet, span)| (*sym, *snippet, self.lower_span(*span))),
379         );
380         let line_spans =
381             self.arena.alloc_from_iter(asm.line_spans.iter().map(|span| self.lower_span(*span)));
382         let hir_asm =
383             hir::InlineAsm { template, template_strs, operands, options: asm.options, line_spans };
384         self.arena.alloc(hir_asm)
385     }
386 }