compiler/rustc_ast_lowering/src/asm.rs

   1 use super::LoweringContext;
   2
   3 use rustc_ast::*;
   4 use rustc_data_structures::fx::FxHashMap;
   5 use rustc_errors::struct_span_err;
   6 use rustc_hir as hir;
   7 use rustc_span::{Span, Symbol};
   8 use rustc_target::asm;
   9 use std::collections::hash_map::Entry;
  10 use std::fmt::Write;
  11
  12 impl<'a, 'hir> LoweringContext<'a, 'hir> {
  13     crate fn lower_inline_asm(&mut self, sp: Span, asm: &InlineAsm) -> &'hir hir::InlineAsm<'hir> {
  14         // Rustdoc needs to support asm! from foriegn architectures: don't try
  15         // lowering the register contraints in this case.
  16         let asm_arch = if self.sess.opts.actually_rustdoc { None } else { self.sess.asm_arch };
  17         if asm_arch.is_none() && !self.sess.opts.actually_rustdoc {
  18             struct_span_err!(self.sess, sp, E0472, "inline assembly is unsupported on this target")
  19                 .emit();
  20         }
  21         if asm.options.contains(InlineAsmOptions::ATT_SYNTAX)
  22             && !matches!(asm_arch, Some(asm::InlineAsmArch::X86 | asm::InlineAsmArch::X86_64))
  23             && !self.sess.opts.actually_rustdoc
  24         {
  25             self.sess
  26                 .struct_span_err(sp, "the `att_syntax` option is only supported on x86")
  27                 .emit();
  28         }
  29
  30         // Lower operands to HIR. We use dummy register classes if an error
  31         // occurs during lowering because we still need to be able to produce a
  32         // valid HIR.
  33         let sess = self.sess;
  34         let operands: Vec<_> = asm
  35             .operands
  36             .iter()
  37             .map(|(op, op_sp)| {
  38                 let lower_reg = |reg| match reg {
  39                     InlineAsmRegOrRegClass::Reg(s) => {
  40                         asm::InlineAsmRegOrRegClass::Reg(if let Some(asm_arch) = asm_arch {
  41                             asm::InlineAsmReg::parse(
  42                                 asm_arch,
  43                                 |feature| sess.target_features.contains(&Symbol::intern(feature)),
  44                                 &sess.target,
  45                                 s,
  46                             )
  47                             .unwrap_or_else(|e| {
  48                                 let msg = format!("invalid register `{}`: {}", s.as_str(), e);
  49                                 sess.struct_span_err(*op_sp, &msg).emit();
  50                                 asm::InlineAsmReg::Err
  51                             })
  52                         } else {
  53                             asm::InlineAsmReg::Err
  54                         })
  55                     }
  56                     InlineAsmRegOrRegClass::RegClass(s) => {
  57                         asm::InlineAsmRegOrRegClass::RegClass(if let Some(asm_arch) = asm_arch {
  58                             asm::InlineAsmRegClass::parse(asm_arch, s).unwrap_or_else(|e| {
  59                                 let msg = format!("invalid register class `{}`: {}", s.as_str(), e);
  60                                 sess.struct_span_err(*op_sp, &msg).emit();
  61                                 asm::InlineAsmRegClass::Err
  62                             })
  63                         } else {
  64                             asm::InlineAsmRegClass::Err
  65                         })
  66                     }
  67                 };
  68
  69                 let op = match *op {
  70                     InlineAsmOperand::In { reg, ref expr } => hir::InlineAsmOperand::In {
  71                         reg: lower_reg(reg),
  72                         expr: self.lower_expr_mut(expr),
  73                     },
  74                     InlineAsmOperand::Out { reg, late, ref expr } => hir::InlineAsmOperand::Out {
  75                         reg: lower_reg(reg),
  76                         late,
  77                         expr: expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
  78                     },
  79                     InlineAsmOperand::InOut { reg, late, ref expr } => {
  80                         hir::InlineAsmOperand::InOut {
  81                             reg: lower_reg(reg),
  82                             late,
  83                             expr: self.lower_expr_mut(expr),
  84                         }
  85                     }
  86                     InlineAsmOperand::SplitInOut { reg, late, ref in_expr, ref out_expr } => {
  87                         hir::InlineAsmOperand::SplitInOut {
  88                             reg: lower_reg(reg),
  89                             late,
  90                             in_expr: self.lower_expr_mut(in_expr),
  91                             out_expr: out_expr.as_ref().map(|expr| self.lower_expr_mut(expr)),
  92                         }
  93                     }
  94                     InlineAsmOperand::Const { ref anon_const } => hir::InlineAsmOperand::Const {
  95                         anon_const: self.lower_anon_const(anon_const),
  96                     },
  97                     InlineAsmOperand::Sym { ref expr } => {
  98                         hir::InlineAsmOperand::Sym { expr: self.lower_expr_mut(expr) }
  99                     }
 100                 };
 101                 (op, *op_sp)
 102             })
 103             .collect();
 104
 105         // Validate template modifiers against the register classes for the operands
 106         for p in &asm.template {
 107             if let InlineAsmTemplatePiece::Placeholder {
 108                 operand_idx,
 109                 modifier: Some(modifier),
 110                 span: placeholder_span,
 111             } = *p
 112             {
 113                 let op_sp = asm.operands[operand_idx].1;
 114                 match &operands[operand_idx].0 {
 115                     hir::InlineAsmOperand::In { reg, .. }
 116                     | hir::InlineAsmOperand::Out { reg, .. }
 117                     | hir::InlineAsmOperand::InOut { reg, .. }
 118                     | hir::InlineAsmOperand::SplitInOut { reg, .. } => {
 119                         let class = reg.reg_class();
 120                         if class == asm::InlineAsmRegClass::Err {
 121                             continue;
 122                         }
 123                         let valid_modifiers = class.valid_modifiers(asm_arch.unwrap());
 124                         if !valid_modifiers.contains(&modifier) {
 125                             let mut err = sess.struct_span_err(
 126                                 placeholder_span,
 127                                 "invalid asm template modifier for this register class",
 128                             );
 129                             err.span_label(placeholder_span, "template modifier");
 130                             err.span_label(op_sp, "argument");
 131                             if !valid_modifiers.is_empty() {
 132                                 let mut mods = format!("`{}`", valid_modifiers[0]);
 133                                 for m in &valid_modifiers[1..] {
 134                                     let _ = write!(mods, ", `{}`", m);
 135                                 }
 136                                 err.note(&format!(
 137                                     "the `{}` register class supports \
 138                                      the following template modifiers: {}",
 139                                     class.name(),
 140                                     mods
 141                                 ));
 142                             } else {
 143                                 err.note(&format!(
 144                                     "the `{}` register class does not support template modifiers",
 145                                     class.name()
 146                                 ));
 147                             }
 148                             err.emit();
 149                         }
 150                     }
 151                     hir::InlineAsmOperand::Const { .. } => {
 152                         let mut err = sess.struct_span_err(
 153                             placeholder_span,
 154                             "asm template modifiers are not allowed for `const` arguments",
 155                         );
 156                         err.span_label(placeholder_span, "template modifier");
 157                         err.span_label(op_sp, "argument");
 158                         err.emit();
 159                     }
 160                     hir::InlineAsmOperand::Sym { .. } => {
 161                         let mut err = sess.struct_span_err(
 162                             placeholder_span,
 163                             "asm template modifiers are not allowed for `sym` arguments",
 164                         );
 165                         err.span_label(placeholder_span, "template modifier");
 166                         err.span_label(op_sp, "argument");
 167                         err.emit();
 168                     }
 169                 }
 170             }
 171         }
 172
 173         let mut used_input_regs = FxHashMap::default();
 174         let mut used_output_regs = FxHashMap::default();
 175         let mut required_features: Vec<&str> = vec![];
 176         for (idx, &(ref op, op_sp)) in operands.iter().enumerate() {
 177             if let Some(reg) = op.reg() {
 178                 // Make sure we don't accidentally carry features from the
 179                 // previous iteration.
 180                 required_features.clear();
 181
 182                 let reg_class = reg.reg_class();
 183                 if reg_class == asm::InlineAsmRegClass::Err {
 184                     continue;
 185                 }
 186
 187                 // We ignore target feature requirements for clobbers: if the
 188                 // feature is disabled then the compiler doesn't care what we
 189                 // do with the registers.
 190                 //
 191                 // Note that this is only possible for explicit register
 192                 // operands, which cannot be used in the asm string.
 193                 let is_clobber = matches!(
 194                     op,
 195                     hir::InlineAsmOperand::Out {
 196                         reg: asm::InlineAsmRegOrRegClass::Reg(_),
 197                         late: _,
 198                         expr: None
 199                     }
 200                 );
 201
 202                 if !is_clobber {
 203                     // Validate register classes against currently enabled target
 204                     // features. We check that at least one type is available for
 205                     // the current target.
 206                     for &(_, feature) in reg_class.supported_types(asm_arch.unwrap()) {
 207                         if let Some(feature) = feature {
 208                             if self.sess.target_features.contains(&Symbol::intern(feature)) {
 209                                 required_features.clear();
 210                                 break;
 211                             } else {
 212                                 required_features.push(feature);
 213                             }
 214                         } else {
 215                             required_features.clear();
 216                             break;
 217                         }
 218                     }
 219                     // We are sorting primitive strs here and can use unstable sort here
 220                     required_features.sort_unstable();
 221                     required_features.dedup();
 222                     match &required_features[..] {
 223                         [] => {}
 224                         [feature] => {
 225                             let msg = format!(
 226                                 "register class `{}` requires the `{}` target feature",
 227                                 reg_class.name(),
 228                                 feature
 229                             );
 230                             sess.struct_span_err(op_sp, &msg).emit();
 231                         }
 232                         features => {
 233                             let msg = format!(
 234                                 "register class `{}` requires at least one target feature: {}",
 235                                 reg_class.name(),
 236                                 features.join(", ")
 237                             );
 238                             sess.struct_span_err(op_sp, &msg).emit();
 239                         }
 240                     }
 241                 }
 242
 243                 // Check for conflicts between explicit register operands.
 244                 if let asm::InlineAsmRegOrRegClass::Reg(reg) = reg {
 245                     let (input, output) = match op {
 246                         hir::InlineAsmOperand::In { .. } => (true, false),
 247
 248                         // Late output do not conflict with inputs, but normal outputs do
 249                         hir::InlineAsmOperand::Out { late, .. } => (!late, true),
 250
 251                         hir::InlineAsmOperand::InOut { .. }
 252                         | hir::InlineAsmOperand::SplitInOut { .. } => (true, true),
 253
 254                         hir::InlineAsmOperand::Const { .. } | hir::InlineAsmOperand::Sym { .. } => {
 255                             unreachable!()
 256                         }
 257                     };
 258
 259                     // Flag to output the error only once per operand
 260                     let mut skip = false;
 261                     reg.overlapping_regs(|r| {
 262                         let mut check = |used_regs: &mut FxHashMap<asm::InlineAsmReg, usize>,
 263                                          input| {
 264                             match used_regs.entry(r) {
 265                                 Entry::Occupied(o) => {
 266                                     if skip {
 267                                         return;
 268                                     }
 269                                     skip = true;
 270
 271                                     let idx2 = *o.get();
 272                                     let &(ref op2, op_sp2) = &operands[idx2];
 273                                     let reg2 = match op2.reg() {
 274                                         Some(asm::InlineAsmRegOrRegClass::Reg(r)) => r,
 275                                         _ => unreachable!(),
 276                                     };
 277
 278                                     let msg = format!(
 279                                         "register `{}` conflicts with register `{}`",
 280                                         reg.name(),
 281                                         reg2.name()
 282                                     );
 283                                     let mut err = sess.struct_span_err(op_sp, &msg);
 284                                     err.span_label(op_sp, &format!("register `{}`", reg.name()));
 285                                     err.span_label(op_sp2, &format!("register `{}`", reg2.name()));
 286
 287                                     match (op, op2) {
 288                                         (
 289                                             hir::InlineAsmOperand::In { .. },
 290                                             hir::InlineAsmOperand::Out { late, .. },
 291                                         )
 292                                         | (
 293                                             hir::InlineAsmOperand::Out { late, .. },
 294                                             hir::InlineAsmOperand::In { .. },
 295                                         ) => {
 296                                             assert!(!*late);
 297                                             let out_op_sp = if input { op_sp2 } else { op_sp };
 298                                             let msg = "use `lateout` instead of \
 299                                                        `out` to avoid conflict";
 300                                             err.span_help(out_op_sp, msg);
 301                                         }
 302                                         _ => {}
 303                                     }
 304
 305                                     err.emit();
 306                                 }
 307                                 Entry::Vacant(v) => {
 308                                     v.insert(idx);
 309                                 }
 310                             }
 311                         };
 312                         if input {
 313                             check(&mut used_input_regs, true);
 314                         }
 315                         if output {
 316                             check(&mut used_output_regs, false);
 317                         }
 318                     });
 319                 }
 320             }
 321         }
 322
 323         let operands = self.arena.alloc_from_iter(operands);
 324         let template = self.arena.alloc_from_iter(asm.template.iter().cloned());
 325         let line_spans = self.arena.alloc_slice(&asm.line_spans[..]);
 326         let hir_asm = hir::InlineAsm { template, operands, options: asm.options, line_spans };
 327         self.arena.alloc(hir_asm)
 328     }
 329 }